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Re: [PATCH 1/3] [ARC] Automatic context save/restore for regular interrupts.
- From: Sandra Loosemore <sandra at codesourcery dot com>
- To: Claudiu Zissulescu <Claudiu dot Zissulescu at synopsys dot com>, <gcc-patches at gcc dot gnu dot org>
- Cc: <Francois dot Bedard at synopsys dot com>, <andrew dot burgess at embecosm dot com>
- Date: Tue, 25 Apr 2017 09:37:35 -0600
- Subject: Re: [PATCH 1/3] [ARC] Automatic context save/restore for regular interrupts.
- Authentication-results: sourceware.org; auth=none
- References: <1493125424-7298-1-git-send-email-claziss@synopsys.com> <1493125424-7298-2-git-send-email-claziss@synopsys.com>
On 04/25/2017 07:03 AM, Claudiu Zissulescu wrote:
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 0eeea7b..cebafe6 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -606,7 +606,7 @@ Objective-C and Objective-C++ Dialects}.
-mnorm -mspfp -mspfp-compact -mspfp-fast -msimd -msoft-float -mswap @gol
-mcrc -mdsp-packa -mdvbf -mlock -mmac-d16 -mmac-24 -mrtsc -mswape @gol
-mtelephony -mxy -misize -mannotate-align -marclinux -marclinux_prof @gol
--mlong-calls -mmedium-calls -msdata @gol
+-mlong-calls -mmedium-calls -msdata -mirq-ctrl-saved @gol
-mvolatile-cache -mtp-regno=@var{regno} @gol
-malign-call -mauto-modify-reg -mbbit-peephole -mno-brcc @gol
-mcase-vector-pcrel -mcompact-casesi -mno-cond-exec -mearly-cbranchsi @gol
@@ -14578,6 +14578,15 @@ hardware extensions. Not available for ARC EM@.
@end table
+@item -mirq-ctrl-saved="REGS"
Use @var{regs} instead of REGS. I assume the quotes are part of the
literal syntax?
+@opindex mirq-ctrl-saved
+Specifies gneral-purposes registers that the processor saves/restores
s/gneral-purposes/general-purpose/
+on interrupt entry and exit. Permited values: r0-r29, fp, blink, and
s/Permited/Permissible/
I think literal strings that are part of the option syntax should have
@samp markup.
+lp_count. Registers needs to be specified as ranges such as "r0-r3".
+A register range always starts with r0. Registers blink and lp_count
+can be specified individually.
You're contradicting yourself here: you say that registers need to be
specified as ranges, and then you say that some registers can be
specified individually. Can you come up with a better explanation of
the syntax? E.g., is it possible to specify multiple registers without
using a range? Or do you specify the option multiple times in that case?
+Only valid for ARC EM and ARC HS
+cores.
+
I suggest a paragraph break here, or at least specify "This option is
only valid...." so it's clear what the subject of this sentence is.
-Sandra