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Re: [PATCH 2/6] RISC-V Port: gcc


On Thu, 02 Feb 2017 10:08:27 PST (-0800), joseph@codesourcery.com wrote:
> On Thu, 2 Feb 2017, Palmer Dabbelt wrote:
>
>> +@table @gcctabopt
>> +@item -mbranch-cost=@var{N}
>> +@opindex mbranch-cost
>> +Set the cost of branches to roughly N instructions.
>
> @var{n} (both places; Texinfo may convert to uppercase depending on the
> output format).
>
>> +@item -mplt
>> +@itemx -mno-plt
>> +@opindex plt
>> +When generating -fpic code, allow the use of PLTs. Ignored for fno-pic.
>
> @option{-fpic}, @option{-fno-pic} (or, better, say PIC and non-PIC rather
> than referring to just one of the options for controlling PIC).
>
>> +natural calling convention: eg LP64 for RV64I, ILP32 for RV32I, LP64D for
>
> e.g.@: (see codingconventions.html).
>
>> +Generate code for given RISC-V ISA (e.g. rv64im).  ISA strings must be
>
> Likewise.
>
>> +lower-case.  Examples include "rv64i", "rv32g", and "rv32imaf".
>
> @samp{rv64i}, etc.
>
>> +@item -msmall-data-limit=@var{N}
>> +@opindex msmall-data-limit
>> +Put global and static data smaller than @var{N} bytes into a special section
>> +(on some targets).
>
> @var{n}, again.

I believe these are all fixed in

  https://github.com/riscv/riscv-gcc/commit/1fad2b80b27a0a44c3838970e8fd5fd0b51d5d6c

We'll submit a v3 patchset with this (and all the other) reviews fixed.

Thanks!


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