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[PATCH, rs6000] Fix PR79160 (vsx-elemrev-4.c)
- From: Bill Schmidt <wschmidt at linux dot vnet dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: segher at kernel dot crashing dot org, dje dot gcc at gmail dot com
- Date: Wed, 25 Jan 2017 16:41:06 -0600
- Subject: [PATCH, rs6000] Fix PR79160 (vsx-elemrev-4.c)
- Authentication-results: sourceware.org; auth=none
Hi,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79160 records that
gcc.target/powerpc/vsx-elemrev-4.c fails on powerpc64 big-endian. The
test was developed just prior to the introduction of D-form memory
access instructions lxv and stxv, so it relied on output of X-form
instructions lxvx and stxvx. Either would be acceptable, but with the
introduction of the D-form instructions, they are preferred by the code
generator when they apply. I've changed the test case to accept either
the D-form or the X-form instructions.
Tested adn veriried on powerpc64-unknown-linux-gnu. Ok for trunk?
Thanks,
Bill
2017-01-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/vsx-elemrev-4.c: Change expected code
generation to accept D-mode memory accesses.
Index: gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c (revision 244824)
+++ gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c (working copy)
@@ -3,8 +3,8 @@
/* { dg-options "-mcpu=power9 -O0" } */
/* { dg-require-effective-target powerpc_p9vector_ok } */
/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */
-/* { dg-final { scan-assembler-times "lxvx" 40 } } */
-/* { dg-final { scan-assembler-times "stxvx" 40 } } */
+/* { dg-final { scan-assembler-times "lxv" 40 } } */
+/* { dg-final { scan-assembler-times "stxv" 40 } } */
#include <altivec.h>