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On Wed, Jan 18, 2017 at 11:08 PM, Uros Bizjak <ubizjak@gmail.com> wrote: > On Wed, Jan 18, 2017 at 10:48 PM, Uros Bizjak <ubizjak@gmail.com> wrote: >> Hello! >> >>> This fix follows the same approach that glibc uses to disable TSX on >>> processors on which it is broken. TSX can also be disabled through a >>> microcode update on these processors, but glibc consensus is that it >>> cannot be detected reliably whether the microcode update has been >>> applied. Thus, we just look for affected models/steppings. >>> >>> Tested on x86_64-linux (but I don't have a machine with broken TSX >>> available). >>> >>> libitm/ChangeLog >>> >>> * config/x86/target.h (htm_available): Add check for some processors >>> on which TSX is broken. >> >> + __cpuid (0, a, b, c, d); >> + if (b == 0x756e6547 && c == 0x6c65746e && d == 0x49656e69) >> >> You can use: >> >> #define signature_INTEL_ebx 0x756e6547 >> #define signature_INTEL_ecx 0x6c65746e >> #define signature_INTEL_edx 0x49656e69 >> >> defines from cpuid.h here. > > Actually, just provide a non-NULL second argument to __get_cpuid_max. > It will return %ebx from cpuid, which should be enough to detect Intel > processor. Attached is the patch I have committed to mainline SVN after a short off-line discussion with Torvald. 2017-01-19 Uros Bizjak <ubizjak@gmail.com> * config/x86/target.h (htm_available): Determine vendor from __get_cpuid_max return. Use signature_INTEL_ebx. Cleanup. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros.
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