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Re: [PATCH 6/6] RISC-V Port: gcc/testsuite


On Wed, 11 Jan 2017, Palmer Dabbelt wrote:

> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
> index 1a4bfe6..665ac23 100644
> --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
> @@ -25,4 +25,4 @@ foo ()
>     but the loop reads only one element at a time, and DOM cannot resolve these.
>     The same happens on powerpc depending on the SIMD support available.  */
>  
> -/* { dg-final { scan-tree-dump "return 28;" "optimized" { xfail { { alpha*-*-* hppa*64*-*-* powerpc64*-*-* } || { sparc*-*-* && lp64 } } } } } */
> +/* { dg-final { scan-tree-dump "return 28;" "optimized" { xfail { { alpha*-*-* hppa*64*-*-* powerpc64*-*-* riscv*64*-*-* } || { sparc*-*-* && lp64 } } } } } */
> diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
> index a287dad..0aecfed 100644
> --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
> +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
> @@ -5,7 +5,7 @@
>  
>     When the condition is true, we distribute "(int) (a + b)" as
>     "(int) a + (int) b", otherwise we keep the original.  */
> -/* { dg-do compile { target { { ! mips64 } && { ! spu-*-* } } } } */
> +/* { dg-do compile { target { { ! mips64 } && { { ! spu-*-* } && { ! riscv*64*-*-* } } } } } */
>  /* { dg-options "-O -fno-tree-forwprop -fno-tree-ccp -fwrapv -fdump-tree-fre1-details" } */
>  
>  /* From PR14844.  */

As I understand it, you have -m options that can change the ABI between 
32-bit and 64-bit.  In such a case you mustn't check for riscv*64*-*-* 
target triplets in the testsuite, since that behave incorrectly when 
testing with an option that changes to the other one of 32-bit and 64-bit 
from the configured default.  Instead, you need to allow for all 
riscv*-*-* triplets and combine as needed with a test such as lp64 or 
ilp32.

-- 
Joseph S. Myers
joseph@codesourcery.com


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