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This patch tweaks the movdi constraints for the PowerPC to use "^" or "$" constraints instead of "?*". This allows the register allocator to more often allocate DImode to a floating point/vector register when it is desirable to do so. I did a full Spec 2006 run with this patch installed, and most of the benchmarks were neutral in terms of performance. The 482.sphinx3 benchmark had a 2.5% performance boost with these patches. There were no benchmarks that regressed with this patch. I built bootstrap compilers and did make check with no regressions on: 1) Little endian power8, --with-cpu=power8 2) Big endian power8, --with-cpu=power8 (no 32-bit support) 3) Big endian power7, --with-cpu=power7 (both 32/64-bit support) Can I check this patch into the trunk? [gcc] 2016-11-18 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.md (movdi_internal32): Change FPR/VSX "?*" load/store constraints to "^" if the instruction allows d-form addressing or "$" if it only allows x-form addressing. Change FPR/VSX move constraints to "^". (movdi_internal64): Likewise. [gcc/testsuite] 2016-11-18 Michael Meissner <meissner@linux.vnet.ibm.com> * gcc.target/powerpc/ppc-round2.c: Allow XSCVDPSXWS and XSCVDPUXWS to be generated instead of FCTIWUZ or FCTIWZ. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797
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