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Re: [PATCH,rs6000] Add built-in function support for Power9 byte instructions
On Tue, Nov 15, 2016 at 12:16:19PM -0700, Kelvin Nilsen wrote:
> The reason I am using SI mode is so that I don't have to disqualify the
> use of these functions on a 32-bit big-endian configuration.
>
> Do you want me to switch to DI mode for all the operands?
SI is fine, and can give slightly better code in some cases (the machine
instructions work fine with garbage in the upper half of the regs, so GCC
can avoid a zero extend in some cases if you use SImode). Marginal
advantage here, we have much bigger suboptimalities with extensions, don't
worry too much about it :-)
> > The code (in rs6000.c) expanding the builtin can create two insns directly,
> > so that you do not need to repeat this over and over in define_expands?
>
> The pattern I'm familiar with is to allocate the temporary scratch
> register during expansion, and to use the allocated temporary at insn
> match time. I'll have to teach myself a new pattern to do all of this
> at insn match time. Feel free to point me to an example of define_insn
> code that does this.
I meant not the define_insn, but the actual builtin expander code, like
for example how altivec_expand_predicate_builtin is hooked up.
Segher