This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [PATCH], PowerPC ISA 3.0, allow QImode/HImode to go into vector registers
On Thu, Nov 10, 2016 at 10:05:25AM -0600, Segher Boessenkool wrote:
> Hi Mike,
>
> > I have built the spec 2006 CPU benchmark suite with these changes, and the
> > power8 (ISA 2.07) code generation does not change.
>
> Very good to hear :-)
>
> Just some nits; okay for trunk with that fixed:
>
> > +(define_split
> > + [(set (match_operand:EXTHI 0 "altivec_register_operand" "")
> > + (sign_extend:EXTHI
> > + (match_operand:HI 1 "indexed_or_indirect_operand" "")))]
> > + "TARGET_P9_VECTOR && reload_completed"
> > + [(set (match_dup 2)
> > + (match_dup 1))
> > + (set (match_dup 0)
> > + (sign_extend:EXTHI (match_dup 2)))]
> > +{
> > + operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));
> > +})
>
> Please lose the default "" (here and elsewhere).
Ok for the match_operands, but I discovered that match_scratch still needs the
"".
> > Property changes on: gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c
> > ___________________________________________________________________
> > Modified: svn:mergeinfo
> > Merged /trunk/gcc/testsuite/gcc.target/powerpc/p9-minmax-1.c:r241733-241924
> >
> >
> > Property changes on: gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c
> > ___________________________________________________________________
> > Modified: svn:mergeinfo
> > Merged /trunk/gcc/testsuite/gcc.target/powerpc/p9-minmax-2.c:r241733-241924
>
> I don't know what this is?
This is some artifact from svnmerge. It shows up a lot of times when I do a
svn diff against the branch. Usually I try to delete it, but once in awhile it
slips through.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797