Re: [PATCH][rtlanal.c] Convert conditional compilation on WORD_REGISTER_OPERATIONS

[Eric Botcazou <ebotcazou at adacore dot com>]

> This converts the preprocessor check for WORD_REGISTER_OPERATIONS into a
> runtime one in rtlanal.c.
> 
> Since this one was in combination with an "#if defined" and used to guard an
> if-statement I'd appreciate it if someone gave it a double-check that I
> dind't screw up the intended behaviour.

Unfortunately I think you did, as the old version was:

#if WORD_REGISTER_OPERATIONS && defined (LOAD_EXTEND_OP)
 	  /* If this is a typical RISC machine, we only have to worry
 	     about the way loads are extended.  */
	  if ((LOAD_EXTEND_OP (inner_mode) == SIGN_EXTEND
	       ? val_signbit_known_set_p (inner_mode, nonzero)
	       : LOAD_EXTEND_OP (inner_mode) != ZERO_EXTEND)
	      || !MEM_P (SUBREG_REG (x)))
#endif

and the new version is:

#ifdef LOAD_EXTEND_OP
 	  /* If this is a typical RISC machine, we only have to worry
 	     about the way loads are extended.  */
	  if (WORD_REGISTER_OPERATIONS
	      && ((LOAD_EXTEND_OP (inner_mode) == SIGN_EXTEND
		     ? val_signbit_known_set_p (inner_mode, nonzero)
		     : LOAD_EXTEND_OP (inner_mode) != ZERO_EXTEND)
		   || !MEM_P (SUBREG_REG (x))))
#endif

So if WORD_REGISTER_OPERATIONS is zero and LOAD_EXTEND_OP is defined, for 
example on PowerPC, the block guarded by the condition is always executed in 
the former case but never in the latter case.

-- 
Eric Botcazou