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Re: [PATCH 5/9] regrename: Don't run if function was separately shrink-wrapped
Hi Bernd,
On Wed, Sep 14, 2016 at 04:01:34PM +0200, Bernd Schmidt wrote:
> On 09/14/2016 03:55 PM, Segher Boessenkool wrote:
> >On Wed, Sep 14, 2016 at 03:08:21PM +0200, Bernd Schmidt wrote:
> >>The data that was posted showed a code size decrease on a number of
> >>targets. I'm really not sure where this irrational hate for regrename
> >>comes from.
> >
> >It increases the number of active, "young" registers per thread.
> >
> >There is no irrational hate. Regrename is simply a de-optimisation on
> >some (heavily) out-of-order targets.
>
> Can you point me at a processor manual for such a chip that explains why
> this would be the case?
The POWER8 UM explains it a bit. I don't have an URL, everything is behind
a registration wall it seems.
> >(It also makes the generated code much harder to read, but you know that).
>
> Can't say I do, really. I imagine it could be the case if it enables
> more aggressive scheduling but that's kind of one of the intended effects.
We have 32 int regs, 32 float regs, 32 vec regs, 8 cond regs. It becomes
really hard to read if things are pretty much randomly jumbled about, as
regrename does.
The dump files are almost impossible to read btw, regrename prints the
assembler name of registers only (not the RTL name), and the assembler name
of all of GPRn, FPRn, VRn, CRn is "n". All (?) other passes print the RTL
register number (or both).
Segher