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Re: [patch] Get rid of stack trampolines for nested functions
- From: "Richard Earnshaw (lists)" <Richard dot Earnshaw at arm dot com>
- To: Eric Botcazou <ebotcazou at adacore dot com>
- Cc: gcc-patches at gcc dot gnu dot org, Ramana Radhakrishnan <Ramana dot Radhakrishnan at arm dot com>
- Date: Mon, 25 Jul 2016 14:34:27 +0100
- Subject: Re: [patch] Get rid of stack trampolines for nested functions
- Authentication-results: sourceware.org; auth=none
- References: <6524055.MLc1u6juUE@polaris> <ed5b9499-95fe-bdf1-9261-a137d9488b41@arm.com> <2128233.nDrTrlnqRG@arcturus.home>
On 25/07/16 14:25, Eric Botcazou wrote:
>> If I understand how this is supposed to work then this is not
>> future-proof against changes to the architecture. The bottom two bits
>> in both AArch32 (arm) and AArch64 are reserved for future use by the
>> architecture; they must not be used by software for tricks like this.
>
> I see, thanks for the info, the value will need to be bumped to 4 then.
>
> From the definition of TARGET_PTRMEMFUNC_VBIT_LOCATION, I gather that the MIPS
> setting is probably incorrect too and ought to be bumped to 2.
>
So does this require that every function have an 8-byte alignment
boundary? or just those that appear in nested functions? If the
former, how do you get routines written in assembler, or produced by
third-party compilers, to comply?
R.