[patch,avr] remove secondary_reload hook implementation

[Georg-Johann Lay <avr at gjlay dot de>]

This removes avr's TARGET_SECONDARY_RELOAD implementation which never worked as 
expected...

Its intention was to provide an 8-bit scratch register for loads from 
non-generic address-spaces as they might need to set RAMPZ to the needed flash 
segment.

The avr BE uses avr_find_unused_d_reg for that purpose, and if that function 
does not come up with a d-reg then the using function avr_out_lpm cooks up a 
scratch on the fly.

Ok for trunk?


Johann

	* config/avr/avr.c (TARGET_SECONDARY_RELOAD): Remove hook define...
	(avr_secondary_reload): ...and implementation.
	(avr_adjust_insn_length) [ADJUST_LEN_LPM]: Remove handling.
	* config/avr/avr.md (reload_in<mode>): Remove insns.
	(adjust_len) [lpm]: Remove insn attribute value.
	* config/avr/predicates.md (flash_operand): Remove insn predicate.

Index: config/avr/avr.c
===================================================================
--- config/avr/avr.c	(revision 238587)
+++ config/avr/avr.c	(working copy)
@@ -2048,50 +2048,6 @@ avr_legitimize_reload_address (rtx *px,
 }
 
 
-/* Implement `TARGET_SECONDARY_RELOAD' */
-
-static reg_class_t
-avr_secondary_reload (bool in_p, rtx x,
-                      reg_class_t reload_class ATTRIBUTE_UNUSED,
-                      machine_mode mode, secondary_reload_info *sri)
-{
-  if (in_p
-      && MEM_P (x)
-      && !ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
-      && ADDR_SPACE_MEMX != MEM_ADDR_SPACE (x))
-    {
-      /* For the non-generic 16-bit spaces we need a d-class scratch.  */
-
-      switch (mode)
-        {
-        default:
-          gcc_unreachable();
-
-        case QImode:  sri->icode = CODE_FOR_reload_inqi; break;
-        case QQmode:  sri->icode = CODE_FOR_reload_inqq; break;
-        case UQQmode: sri->icode = CODE_FOR_reload_inuqq; break;
-
-        case HImode:  sri->icode = CODE_FOR_reload_inhi; break;
-        case HQmode:  sri->icode = CODE_FOR_reload_inhq; break;
-        case HAmode:  sri->icode = CODE_FOR_reload_inha; break;
-        case UHQmode: sri->icode = CODE_FOR_reload_inuhq; break;
-        case UHAmode: sri->icode = CODE_FOR_reload_inuha; break;
-
-        case PSImode: sri->icode = CODE_FOR_reload_inpsi; break;
-
-        case SImode:  sri->icode = CODE_FOR_reload_insi; break;
-        case SFmode:  sri->icode = CODE_FOR_reload_insf; break;
-        case SQmode:  sri->icode = CODE_FOR_reload_insq; break;
-        case SAmode:  sri->icode = CODE_FOR_reload_insa; break;
-        case USQmode: sri->icode = CODE_FOR_reload_inusq; break;
-        case USAmode: sri->icode = CODE_FOR_reload_inusa; break;
-        }
-    }
-
-  return NO_REGS;
-}
-
-
 /* Helper function to print assembler resp. track instruction
    sequence lengths.  Always return "".
 
@@ -8847,7 +8803,6 @@ avr_adjust_insn_length (rtx_insn *insn,
     case ADJUST_LEN_MOV32: output_movsisf (insn, op, &len); break;
     case ADJUST_LEN_MOVMEM: avr_out_movmem (insn, op, &len); break;
     case ADJUST_LEN_XLOAD: avr_out_xload (insn, op, &len); break;
-    case ADJUST_LEN_LPM: avr_out_lpm (insn, op, &len); break;
     case ADJUST_LEN_SEXT: avr_out_sign_extend (insn, op, &len); break;
 
     case ADJUST_LEN_SFRACT: avr_out_fract (insn, op, true, &len); break;
@@ -13888,9 +13843,6 @@ avr_fold_builtin (tree fndecl, int n_arg
 #undef  TARGET_MODE_DEPENDENT_ADDRESS_P
 #define TARGET_MODE_DEPENDENT_ADDRESS_P avr_mode_dependent_address_p
 
-#undef  TARGET_SECONDARY_RELOAD
-#define TARGET_SECONDARY_RELOAD avr_secondary_reload
-
 #undef  TARGET_PRINT_OPERAND
 #define TARGET_PRINT_OPERAND avr_print_operand
 #undef  TARGET_PRINT_OPERAND_ADDRESS
Index: config/avr/avr.md
===================================================================
--- config/avr/avr.md	(revision 238587)
+++ config/avr/avr.md	(working copy)
@@ -151,7 +151,7 @@ (define_attr "adjust_len"
    tsthi, tstpsi, tstsi, compare, compare64, call,
    mov8, mov16, mov24, mov32, reload_in16, reload_in24, reload_in32,
    ufract, sfract, round,
-   xload, lpm, movmem,
+   xload, movmem,
    ashlqi, ashrqi, lshrqi,
    ashlhi, ashrhi, lshrhi,
    ashlsi, ashrsi, lshrsi,
@@ -455,23 +455,6 @@ (define_split
 ;;========================================================================
 ;; Move stuff around
 
-;; Secondary input reload from non-generic 16-bit address spaces
-(define_insn "reload_in<mode>"
-  [(set (match_operand:MOVMODE 0 "register_operand"   "=r")
-        (match_operand:MOVMODE 1 "flash_operand"       "m"))
-   (clobber (match_operand:QI 2 "d_register_operand"  "=d"))]
-  ;; Fixme: The insn condition must not test the address space.
-  ;;   Because the gen tools refuse to generate insns for address spaces
-  ;;   and will generate insn-codes.h to look like:
-  ;;   #define CODE_FOR_reload_inhi CODE_FOR_nothing
-  "reload_completed || reload_in_progress"
-  {
-    return avr_out_lpm (insn, operands, NULL);
-  }
-  [(set_attr "adjust_len" "lpm")
-   (set_attr "cc" "clobber")])
-
-
 ;; "loadqi_libgcc"
 ;; "loadhi_libgcc"
 ;; "loadpsi_libgcc"
Index: config/avr/predicates.md
===================================================================
--- config/avr/predicates.md	(revision 238586)
+++ config/avr/predicates.md	(working copy)
@@ -76,13 +76,6 @@ (define_predicate "nox_general_operand"
        (not (match_test "avr_load_libgcc_p (op)"))
        (not (match_test "avr_mem_memx_p (op)"))))
 
-;; Return 1 if OP is a memory operand in one of the __flash* address spaces
-(define_predicate "flash_operand"
-  (and (match_operand 0 "memory_operand")
-       (match_test "Pmode == mode")
-       (ior (match_test "!MEM_P (op)")
-            (match_test "avr_mem_flash_p (op)"))))
-
 ;; Return 1 if OP is the zero constant for MODE.
 (define_predicate "const0_operand"
   (and (match_code "const_int,const_fixed,const_double")