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[PATCH, rs6000] Fix PR target/71698, ICE in reload copying TDmode values to GPR regs
- From: Peter Bergner <bergner at vnet dot ibm dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Cc: Segher Boessenkool <segher at kernel dot crashing dot org>, David Edelsohn <dje dot gcc at gmail dot com>, Aaron Sawdey <acsawdey at linux dot vnet dot ibm dot com>, Bill Schmidt <wschmidt at linux dot vnet dot ibm dot com>, Michael Meissner <meissner at linux dot vnet dot ibm dot com>
- Date: Thu, 30 Jun 2016 17:55:04 -0500
- Subject: [PATCH, rs6000] Fix PR target/71698, ICE in reload copying TDmode values to GPR regs
- Authentication-results: sourceware.org; auth=none
We currently don't allow TDmode values to use direct moves, since they
live in register pairs and the most significant word is always in the
even-numbered register which does not match subreg ordering in little
endian mode. The following patch fixes PR71698 by disallowing reload
from using direct moves for TDmode values.
This passed bootstrap and regtesting with no regressions. Ok for trunk?
This is also broken on the FSF 6 branch, so is this ok there too after
bootstrap and regtesting there?
Peter
gcc/
PR target/71698
* config/rs6000/rs6000.c (rs6000_secondary_reload_simple_move): Disallow
TDmode values.
gcc/testsuite/
PR target/71698
* gcc.target/powerpc/pr71698.c: New test.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 237893)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -19194,7 +19194,8 @@ rs6000_secondary_reload_simple_move (enu
simple move insns are issued. At present, 32-bit integers are not allowed
in FPR/VSX registers. Single precision binary floating is not a simple
move because we need to convert to the single precision memory layout.
- The 4-byte SDmode can be moved. */
+ The 4-byte SDmode can be moved. TDmode values are disallowed since they
+ need special direct move handling, which we do not support yet. */
size = GET_MODE_SIZE (mode);
if (TARGET_DIRECT_MOVE
&& ((mode == SDmode) || (TARGET_POWERPC64 && size == 8))
@@ -19202,7 +19203,7 @@ rs6000_secondary_reload_simple_move (enu
|| (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)))
return true;
- else if (TARGET_DIRECT_MOVE_128 && size == 16
+ else if (TARGET_DIRECT_MOVE_128 && size == 16 && mode != TDmode
&& ((to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)
|| (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)))
return true;
Index: gcc/testsuite/gcc.target/powerpc/pr71698.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr71698.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr71698.c (working copy)
@@ -0,0 +1,13 @@
+/* Test for a reload ICE arising from trying to direct move a TDmode value. */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-require-effective-target dfp } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-O1 -mcpu=power9 -mno-lra" } */
+
+extern void testvad128 (int n, ...);
+void
+testitd128 (_Decimal128 g01d128)
+{
+ testvad128 (1, g01d128);
+}