Re: [PATCH][AArch64][1/2] Add support INS (element) instruction to copy lanes between vectors

[Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>]

Ping.
Richard, Marcus, do you have any feedback on this?

https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00502.html

Thanks,
Kyrill
On 14/06/16 10:36, James Greenhalgh wrote:
> On Tue, Jun 07, 2016 at 05:56:47PM +0100, Kyrill Tkachov wrote:
> > Hi all,
> >
> > This patch addresses an deficiency we have in handling vector lane-to-lane
> > moves in the AArch64 backend.  Generally we can use the INS (element)
> > instruction but, as a user complains in
> > https://gcc.gnu.org/ml/gcc-help/2016-05/msg00069.html
> > we don't. James had a patch adding an appropriate combine pattern some time
> > ago (https://gcc.gnu.org/ml/gcc-patches/2013-09/msg01068.html) but it never
> > got applied.
> >
> > This patch is a rebase of that patch that adds necessary
> > vec_merge+vec_duplicate+vec_select combine pattern.  I chose to use a
> > define_insn rather than the define_insn_and_split in that patch that just
> > deletes the instruction when the source and destination registers are the
> > same, as I think that's not he combine patterns job to delete the redundant
> > instruction but rather some other passes job. Also, I was not able to create
> > a testcase where it would make a difference.
> >
> > Also, this patch doesn't reimplement that vcopy*lane* intrinsics from inline
> > assembly to a vget_lane+vset_lane combo.  This can be done as a separate
> > patch on top of this one.
> >
> > Bootstrapped and tested on aarch64-none-linux-gnu.
> > Also tested on aarch64_be-none-elf.
> >
> > Ok for trunk?
> This looks OK to me, but as it is based on my code I probably can't
> approve it within the spirit of the write access policies (I only have
> localized review permission).
>
> Best wait for Richard/Marcus or a global reviewer to take a look.
>
> > Thanks,
> > Kyrill
> >
> > 2016-06-07  James Greenhalgh  <james.greenhalgh@arm.com>
> >              Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> >
> >      * config/aarch64/aarch64-simd.md (*aarch64_simd_vec_copy_lane<mode>):
> >      New define_insn.
> >   (*aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
> Watch your ChangeLog formatting.
>
> Thanks,
> James
>
> > 2016-06-07  James Greenhalgh  <james.greenhalgh@arm.com>
> >              Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
> >
> >      * gcc.target/aarch64/vget_set_lane_1.c: New test.