[PATCH], PowerPC: Allow DImode in Altivec registers

[Michael Meissner <meissner at linux dot vnet dot ibm dot com>]

This patch goes through the PowerPC compiler and adds support to allow DImode
(64-bit integers) into Altivec registers for VSX systems.  It also adds some
support to allow loading some DImode constants via either ISA 2.07 or ISA 3.0
instructions.

I have bootstrapped this with no regressions on both a big endian power7 system
and a little endian power8 system.

I have run a Spec 2006 INT tests with these changes, and the run times were
comparable between the original compiler and the compiler with the changes.

Are these changes ok to install in the trunk?  Assuming they go in the trunk,
can I install them in the 6.2 branch if they cause no regression?

Note, I will be away from the office, starting Thursday afternoon (June 16th,
2016) and I will return on Monday (June 20th, 2016).  I will not have easy
access to email during this time.

[gcc]
2016-06-13  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (VSINT_84): Add DImode to enable loading
	DImode constants with XXSPLTIB in vector registers.
	(vsx_extract_<mode>, V2DImode/V2DFmode): Combine both
	vsx_extract_<mode>_internal{1,2} into a single insn that handles
	direct move (both ISA 2.07 and ISA 3.0 versions), and optimizes
	extraction of the element at the top of the register as a scalar
	value.
	(vsx_extract_<mode>_internal1): Likewise.
	(vsx_extract_<mode>_internal2): Likewise.
	* config/rs6000/constraints.md (wi constraint): Remove a comment
	about DImode not being allowed in Altivec registers.
	(wB constraint): New constraint for constants that can be
	generated in Altivec registers with VSPLTISW/VUPKHSW.
	* config/rs6000/predicates.md (xxspltib_constant_split): Update
	comments.
	(xxspltib_constant_nosplit): Likewise.
	* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Add
	support for -mupper-regs-di to enable DImode to go into Altivec
	registers.
	(POWERPC_MASKS): Likewise.
	(power7 cpu): Likewise.
	* config/rs6000/rs6000.opt (-mupper-regs-di): Likewise.
	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Add support
	for DImode being allowed in Altivec registers.  Update wi/wj
	constraints.  Set scalar_in_vmx_p flag.
	(rs6000_option_override_internal): Add checks for -mupper-regs-di.
	(xxspltib_constant_p): Allow CONST_INT's with VOIDmode.  Don't
	return true if we could use VSPLTISW/VUPKHSW instead of XXSPLTIB.
	(rs6000_opt_masks): Add -mupper-regs-di.
	* config/rs6000/rs6000.md (lfiwax): Update clobbers that don't use
	direct move to use wi and now wj.
	(lfiwzx): Likewise.
	(floatsi<mode>2_lfiwax_mem): Combine alternatives into a single
	alternative.
	(floatunssi<mode>2_lfiwzx_mem): Likewise.
	(fix_trunc<mode>di2_fctidz): Change second alternative to allow
	any VSX register, instead of just Altivec registers, to allow
	either operand to be an Altivec register or both.
	(fixuns_trunc<mode>di2_fctiduz): Likewise.
	(movdi_internal32): Add support for -mupper-regs-di.  Add support
	to load constants via XXSPLTIB or VSPLTISW.  Add spacing to allow
	the alternatives and attributes to be lined up to be easier to
	read.
	(movdi_internal64): Likewise.
	(64-bit DImode splitters): Change predicates to only split loading
	up GPR registers.  Add splits for using XXSPLTIB or VSPLTISW to
	load constants in ISA 3.0 or ISA 2.07 respectively.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Document
	-mupper-regs-di.  Update -mupper-regs-df and -mupper-regs-sf to
	mention -mcpu=power9 sets these options.
	* doc/md.texi (PowerPC and IBM RS6000 constraints): Document the
	wB constraint.

[gcc/testsuite]
2016-06-13  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p9-dimode1.c: New test.
	* gcc.target/powerpc/p9-dimode2.c: Likewise.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797