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Re: [PATCH][wwwdocs][AArch64] Mention -mcpu=qdf24xx support for GCC 6
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>, Marcus Shawcroft <marcus dot shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, "Jim Wilson" <jim dot wilson at linaro dot org>, <nd at arm dot com>
- Date: Thu, 2 Jun 2016 17:24:46 +0100
- Subject: Re: [PATCH][wwwdocs][AArch64] Mention -mcpu=qdf24xx support for GCC 6
- Authentication-results: sourceware.org; auth=none
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- References: <575048B3 dot 8020906 at foss dot arm dot com>
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On Thu, Jun 02, 2016 at 03:54:43PM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> As discussed some time ago with Jim, here's the AArch64 note mentioning the
> support for Qualcomm QDF24xx that was added in GCC 6.
>
> Ok to commit?
OK.
Thanks,
James
> Index: htdocs/gcc-6/changes.html
> ===================================================================
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-6/changes.html,v
> retrieving revision 1.82
> diff -U 3 -r1.82 changes.html
> --- htdocs/gcc-6/changes.html 31 May 2016 08:01:35 -0000 1.82
> +++ htdocs/gcc-6/changes.html 2 Jun 2016 14:44:02 -0000
> @@ -435,6 +435,11 @@
> options as well as the equivalent target attributes and pragmas.
> </li>
> <li>
> + The Qualcomm QDF24xx processor is now supported via the
> + <code>-mcpu=qdf24xx</code> and <code>-mtune=qdf24xx</code>
> + options as well as the equivalent target attributes and pragmas.
> + </li>
> + <li>
> Code generation for the ARM Cortex-A57 processor is improved.
> Among general code generation improvements, a better algorithm is
> added for allocating registers to floating-point multiply-accumulate