Re: RFC: [Patch, PR Bug 60818] - ICE in validate_condition_mode on powerpc*-linux-gnu* ]

[Alan Modra <amodra at gmail dot com>]

On Tue, Feb 16, 2016 at 07:00:58PM +1030, Alan Modra wrote:
> What's wrong is the rs6000 backend asserting that (gtu (reg:CC)) can't
> happen, because obviously it does.  Rather than trying to fix combine,
> (where the ICE happens on attempting to validate the insn!), I think
> the rs6000 backend should change.  Like so.  Not yet bootstrapped,
> but I'm about to fire one off.
> 
> 	PR target/60818
> 	* config/rs6000/rs6000.c (validate_condition_mode): Return a
> 	bool rather than asserting modes as expected.  Update all uses
> 	to assert.
> 	* config/rs6000/rs6000-protos.h (validate_condition_mode):
> 	Update prototype.
> 	* config/rs6000/predicates.md (branch_comparison_operator):
> 	Use result of validate_condition_mode.

Now bootstrapped and regression tested powerpc64le-linux and
powerpc64-linux biarch, mainline, gcc-5 and gcc-4.9.  With this
testsuite addition.  OK to apply?

	* gcc.target/powerpc/pr60818.c: New.

diff --git a/gcc/testsuite/gcc.target/powerpc/pr60818.c b/gcc/testsuite/gcc.target/powerpc/pr60818.c
new file mode 100644
index 0000000..773480b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr60818.c
@@ -0,0 +1,62 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-options "-O1 -mno-mfcrf -misel" } */
+
+int d7;
+
+static int
+ca(int l3)
+{
+  for (d7 = 0; d7 < 1; ++d7)
+    ;
+  return l3;
+}
+
+int
+c9(void)
+{
+  int yj;
+  return ca(((yj != 1) & 65535U) > d7);
+}
+
+
+int
+kf(int a2, unsigned int dc)
+{
+  int t3;
+  int b1[2];
+  for (t3 = 0; t3 < 2; ++t3)
+    b1[t3] = 2;
+  return ((t3 > a2) >= b1[0]) < dc;
+}
+
+
+void
+ds(void)
+{
+  unsigned int t5;
+  unsigned int re;
+  int yn;
+  int *o2;
+  int *s0 = &yn;
+  for (re = 0; re < 2; ++re)
+    if (0 != t5)
+      *o2 = (*s0 ^= 1) | (re = ((t5 < yn) >= (t5 > yn)));
+}
+
+
+unsigned int ou;
+int jv (void)
+{
+  unsigned int rg;
+  return rg < ou;
+}
+
+
+unsigned int vz, tr, c, fr;
+
+void
+gi(void)
+{
+  if (vz < 1)
+    vz = ((fr < tr) >= (fr > tr));
+}

-- 
Alan Modra
Australia Development Lab, IBM