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Re: [Patch] S/390: Simplify vector conditionals
- From: Robin Dapp <rdapp at linux dot vnet dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Andreas Krebbel <krebbel at linux dot vnet dot ibm dot com>
- Date: Thu, 17 Dec 2015 10:51:30 +0100
- Subject: Re: [Patch] S/390: Simplify vector conditionals
- Authentication-results: sourceware.org; auth=none
- References: <566FE30F dot 6090509 at linux dot vnet dot ibm dot com>
Hi,
the attached patch renames the constm1_operand predicate to
all_ones_operand and introduces a check for int mode.
It should be applied on top of the last patch ([Patch] S/390: Simplify
vector conditionals).
Regtested on s390.
Regards
Robin
gcc/ChangeLog:
2015-12-15 Robin Dapp <rdapp@linux.vnet.ibm.com>
* config/s390/predicates.md: Change and rename
constm1_operand to all_ones_operand
* config/s390/s390.c (s390_expand_vcond): Use all_ones_operand
* config/s390/vector.md: Likewise
diff --git a/gcc/config/s390/predicates.md b/gcc/config/s390/predicates.md
index 5c462c4..02a1e4e 100644
--- a/gcc/config/s390/predicates.md
+++ b/gcc/config/s390/predicates.md
@@ -29,9 +29,10 @@
(and (match_code "const_int,const_wide_int,const_double,const_vector")
(match_test "op == CONST0_RTX (mode)")))
-;; Return true if OP an all ones operand (int/float/vector).
-(define_predicate "constm1_operand"
- (and (match_code "const_int,const_wide_int,const_double,const_vector")
+;; Return true if OP an all ones operand (int/vector).
+(define_predicate "all_ones_operand"
+ (and (match_code "const_int, const_wide_int, const_vector")
+ (match_test "INTEGRAL_MODE_P (GET_MODE (op))")
(match_test "op == CONSTM1_RTX (mode)")))
;; Return true if OP is a 4 bit mask operand
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 529b884..d58c243 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -6169,7 +6169,7 @@ s390_expand_vcond (rtx target, rtx then, rtx els,
}
/* if x < 0 ? -1 : 0 or if x >= 0 ? 0 : -1 */
- else if (constm1_operand (negop, target_mode))
+ else if (all_ones_operand (negop, target_mode))
{
rtx res = expand_simple_binop (cmp_mode, ASHIFTRT, cmp_op1,
GEN_INT (shift), target,
@@ -6199,7 +6199,7 @@ s390_expand_vcond (rtx target, rtx then, rtx els,
/* If the results are supposed to be either -1 or 0 we are done
since this is what our compare instructions generate anyway. */
- if (constm1_operand (then, GET_MODE (then))
+ if (all_ones_operand (then, GET_MODE (then))
&& const0_operand (els, GET_MODE (els)))
{
emit_move_insn (target, gen_rtx_SUBREG (target_mode,
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index f6a85c8..cd9407a 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -1107,7 +1107,7 @@
(eq (match_operand:<tointvec> 3 "register_operand" "")
(match_operand:V 4 "const0_operand" ""))
(match_operand:V 1 "const0_operand" "")
- (match_operand:V 2 "constm1_operand" "")))]
+ (match_operand:V 2 "all_ones_operand" "")))]
"TARGET_VX"
[(set (match_dup 0) (match_dup 3))]
{
@@ -1120,7 +1120,7 @@
(if_then_else:V
(eq (match_operand:<tointvec> 3 "register_operand" "")
(match_operand:V 4 "const0_operand" ""))
- (match_operand:V 1 "constm1_operand" "")
+ (match_operand:V 1 "all_ones_operand" "")
(match_operand:V 2 "const0_operand" "")))]
"TARGET_VX"
[(set (match_dup 0) (not:V (match_dup 3)))]
@@ -1134,7 +1134,7 @@
(if_then_else:V
(ne (match_operand:<tointvec> 3 "register_operand" "")
(match_operand:V 4 "const0_operand" ""))
- (match_operand:V 1 "constm1_operand" "")
+ (match_operand:V 1 "all_ones_operand" "")
(match_operand:V 2 "const0_operand" "")))]
"TARGET_VX"
[(set (match_dup 0) (match_dup 3))]
@@ -1149,7 +1149,7 @@
(ne (match_operand:<tointvec> 3 "register_operand" "")
(match_operand:V 4 "const0_operand" ""))
(match_operand:V 1 "const0_operand" "")
- (match_operand:V 2 "constm1_operand" "")))]
+ (match_operand:V 2 "all_ones_operand" "")))]
"TARGET_VX"
[(set (match_dup 0) (not:V (match_dup 3)))]
{
@@ -1185,7 +1185,7 @@
[(set (match_operand:V 0 "register_operand" "=v")
(if_then_else:V
(eq (match_operand:<tointvec> 3 "register_operand" "v")
- (match_operand:<tointvec> 4 "constm1_operand" ""))
+ (match_operand:<tointvec> 4 "all_ones_operand" ""))
(match_operand:V 1 "register_operand" "v")
(match_operand:V 2 "register_operand" "v")))]
"TARGET_VX"
@@ -1197,7 +1197,7 @@
[(set (match_operand:V 0 "register_operand" "=v")
(if_then_else:V
(eq (not:<tointvec> (match_operand:<tointvec> 3 "register_operand" "v"))
- (match_operand:<tointvec> 4 "constm1_operand" ""))
+ (match_operand:<tointvec> 4 "all_ones_operand" ""))
(match_operand:V 1 "register_operand" "v")
(match_operand:V 2 "register_operand" "v")))]
"TARGET_VX"