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[PATCH, i386, AVX-512] Enable QI-mode mask logic patterns on non- AVX-512DQ targets.


Hello,
Masks QI mode size are of extreme importance for AVX-512F,
so I propose to modify my commit [1] and allow kmovb to be
generated on non- AVX512DQ targets.

This also fixes ICE on Spec2k6/453.povray.

Bootstrapped and reg-tested.

If no objections, I'll commit by the EOW.

gcc/
	* config/i386/i386.md (define_mode_iterator SWI1248_AVX512BW): New.
	(define_insn "*k<logic><mode>"): Use new iterator.

--
Thanks, K

commit 91b7010c935d35368e0de7524a2c1f4c5ee139ff
Author: Kirill Yukhin <kirill.yukhin@intel.com>
Date:   Wed Nov 25 11:23:08 2015 +0300

    AVX-512. Allow QI mode k<logic> operations using 16b instructions.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index a57d165..cbb9ffd 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7996,10 +7996,13 @@
 	(any_logic:SWI1248x (match_dup 1)
 			    (match_dup 2)))])
 
+(define_mode_iterator SWI1248_AVX512BW
+  [QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
+
 (define_insn "*k<logic><mode>"
-  [(set (match_operand:SWI1248_AVX512BWDQ 0 "mask_reg_operand" "=k")
-	(any_logic:SWI1248_AVX512BWDQ (match_operand:SWI1248_AVX512BWDQ 1 "mask_reg_operand" "k")
-			  (match_operand:SWI1248_AVX512BWDQ 2 "mask_reg_operand" "k")))]
+  [(set (match_operand:SWI1248_AVX512BW 0 "mask_reg_operand" "=k")
+	(any_logic:SWI1248_AVX512BW (match_operand:SWI1248_AVX512BW 1 "mask_reg_operand" "k")
+				    (match_operand:SWI1248_AVX512BW 2 "mask_reg_operand" "k")))]
   "TARGET_AVX512F"
   {
     if (!TARGET_AVX512DQ && <MODE>mode == QImode)




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