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Re: [ARM] Fix PR middle-end/65958


Hi Eric,

On 06/10/15 11:11, Eric Botcazou wrote:
Here's the implementation for aarch64, very similar but simpler since there is
no shortage of scratch registers; the only thing to note is the new blockage
pattern.  This was tested on real hardware but not with Linux, instead with
Darwin (experimental port of the toolchain to iOS) and makes it possible to
pass ACATS (Ada conformance testsuite which requires stack checking).

There is also a couple of tweaks for the ARM implementation: a cosmetic one
for the probe_stack pattern and one for the output_probe_stack_range loop.

I assume that this patch (and arm patch) will change the instruction
sequences in prologue.  If so, do you have some examples about how
prologue is changed with this patch?  I need to adapt GDB prologue
analyser to these new instruction sequences.

--
Yao (éå)


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