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Re: [AArch64] Improve TLS Descriptor pattern to release RTL loop IV opt
- From: Marcus Shawcroft <marcus dot shawcroft at gmail dot com>
- To: Jiong Wang <jiong dot wang at arm dot com>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 28 Sep 2015 16:37:16 +0100
- Subject: Re: [AArch64] Improve TLS Descriptor pattern to release RTL loop IV opt
- Authentication-results: sourceware.org; auth=none
- References: <n99bnewfm4l dot fsf at arm dot com>
On 28 July 2015 at 14:12, Jiong Wang <jiong.wang@arm.com> wrote:
>
> The instruction sequences for preparing argument for TLS descriptor
> runtime resolver and the later function call to resolver can actually be
> hoisted out of the loop.
>
> Currently we can't because we have exposed the hard register X0 as
> destination of "set". While GCC's RTL data flow infrastructure will
> skip or do very conservative assumption when hard register involved in
> and thus some loop IV opportunities are missed.
This patch feels like we are botching the back end to over come a
limitation in RTL IV opt. Isn't the real solution in RTL IV opt ?
/Marcus
>
> This patch add another "tlsdesc_small_pseudo_<mode>" pattern, and avoid
> expose x0 to gcc generic code.
>
> Generally, we define a new register class FIXED_R0 which only contains register
> 0, so the instruction sequences generated from the new add pattern is the same
> as tlsdesc_small_<mode>, while the operand 0 is wrapped as pseudo register that
> RTL IV opt can handle it.
>
> Ideally, we should allow operand 0 to be any pseudo register, but then
> we can't model the override of x0 caused by the function call which is
> hidded by the UNSPEC.
>
> So here, we restricting operand 0 to be x0, the override of x0 can be
> reflected to the gcc.
>
> OK for trunk?
>
> 2015-07-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
> Jiong Wang <jiong.wang@arm.com>
>
> gcc/
> * config/aarch64/aarch64.d (tlsdesc_small_pseudo_<mode>): New pattern.
> * config/aarch64/aarch64.h (reg_class): New enumeration FIXED_REG0.
> (REG_CLASS_NAMES): Likewise.
> (REG_CLASS_CONTENTS): Likewise.
> * config/aarch64/aarch64.c (aarch64_class_max_nregs): Likewise.
> (aarch64_register_move_cost): Likewise.
> (aarch64_load_symref_appropriately): Invoke the new added pattern if
> possible.
> * config/aarch64/constraints.md (Uc0): New constraint.
>
> gcc/testsuite.
> * gcc.target/aarch64/tlsdesc_hoist.c: New testcase.
>
> --
> Regards,
> Jiong
>