This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[AArch64] Force __builtin_aarch64_fp[sc]r argument into a REG


The attached testcase triggered an ICE because the builtin expansion
code passed the output of expand_normal directly to the SET_FP[SC]R
generator, without forcing it into a register first.

Tested on aarch64-linux-gnu.  OK to install?

Thanks,
Richard

gcc/
	* config/aarch64/aarch64-builtins.c (aarch64_expand_builtin): Force
	__builtin_aarch64_fp[sc]r arguments into a register.

gcc/testsuite/
	* gcc.target/aarch64/fpcr_fpsr_1.c: New file.

diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index e3a90b5..62af878 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -1164,7 +1164,7 @@ aarch64_expand_builtin (tree exp,
 	  icode = (fcode == AARCH64_BUILTIN_SET_FPSR) ?
 	    CODE_FOR_set_fpsr : CODE_FOR_set_fpcr;
 	  arg0 = CALL_EXPR_ARG (exp, 0);
-	  op0 = expand_normal (arg0);
+	  op0 = force_reg (SImode, expand_normal (arg0));
 	  pat = GEN_FCN (icode) (op0);
 	}
       emit_insn (pat);
diff --git a/gcc/testsuite/gcc.target/aarch64/fpcr_fpsr_1.c b/gcc/testsuite/gcc.target/aarch64/fpcr_fpsr_1.c
new file mode 100644
index 0000000..29aa1f4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/fpcr_fpsr_1.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+void
+f1 (int *x)
+{
+  __builtin_aarch64_set_fpsr (*x);
+}
+
+void
+f2 (int *x)
+{
+  __builtin_aarch64_set_fpcr (*x);
+}
+
+void
+f3 (int *x)
+{
+  *x = __builtin_aarch64_get_fpsr ();
+}
+
+void
+f4 (int *x)
+{
+  *x = __builtin_aarch64_get_fpcr ();
+}


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]