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Re: [Patch ARM-AArch64/testsuite Neon intrinsics 00/20] Executable tests
- From: James Greenhalgh <james dot greenhalgh at arm dot com>
- To: Christophe Lyon <christophe dot lyon at linaro dot org>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 16 Jun 2015 11:08:50 +0100
- Subject: Re: [Patch ARM-AArch64/testsuite Neon intrinsics 00/20] Executable tests
- Authentication-results: sourceware.org; auth=none
- References: <1432757747-4891-1-git-send-email-christophe dot lyon at linaro dot org> <CAKdteOae+kA-isezhFm3757qymzhYECs9kZ9A_Bw1OXzuz8AWw at mail dot gmail dot com>
On Mon, Jun 15, 2015 at 11:11:16PM +0100, Christophe Lyon wrote:
> Ping?
>
>
> On 27 May 2015 at 22:15, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> > This patch series is a follow-up to the tests I already contributed,
> > converted from my original testsuite.
> >
> > This series consists in 20 new patches, which can be committed
> > independently. For vrecpe, I added the setting of the "Flush-to-Zero"
> > FP flag, to force AArch64 to behave the same as ARM by default.
> >
> > This is the final batch, except for the vget_lane tests which I will
> > submit later. This should cover the subset of AdvSIMD intrinsics
> > common to ARMv7 and AArch64.
> >
> > Tested with qemu on arm*linux, aarch64-linux.
> >
> > 2015-05-27 Christophe Lyon <christophe.lyon@linaro.org>
> >
> > * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
> > (_ARM_FPSCR): Add FZ field.
> > (clean_results): Force FZ=1 on AArch64.
> > * gcc.target/aarch64/advsimd-intrinsics/vrecpe.c: New file.
> > * gcc.target/aarch64/advsimd-intrinsics/vrecps.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vrev.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vrshr_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vrsra_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vset_lane.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vshl_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vshll_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vshr_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vshrn_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vsra_n.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vtbX.c: Likewise.
> > * gcc.target/aarch64/advsimd-intrinsics/vtst.c: Likewise.
> >
This patch set is OK.
As with the last patch set, please do a quick run through of each patch
before committing and ensure that the trailing '\' characters line up,
and look for any fall-out (particularly on aarch64_be) after these are in.
Thanks,
James