Just to confirm, this doesn't change the size of a REG object, right?
If it doesn't change the size, then it's OK.
It doesn't change the size for LP64 hosts. It makes it 32 bits bigger
for ILP32 hosts. See https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01598.html
for discussion about that.
If we make the opposite call this time and say that it's better to have
two alternative rtx layouts rather than grow an rtx for ILP32 hosts,
then there are things we could do. E.g. I doubt an ILP32 host has
enough addressable memory to cope with 1<<24 registers (and associated
instructions), so for ILP32 we could split original_regno into an 8/24
bitfield, using the :8 for the number of registers and the :24 for the
original_regno. original_regno is so rarely used that an extra shift
or mask shouldn't matter.
Or we could simply leave ILP32 hosts accessing hard_regno_nregs each
time. The problem then would be that an incorrectly-cached number
of registers would only show up on one type of host. It would also mean
that REG_NREGS would need to be defined in regs.h for ILP32 at least,
since hard_regno_nregs isn't visible inside rtl.h.