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Re: Mostly rewrite genrecog
- From: Andreas Krebbel <krebbel at linux dot vnet dot ibm dot com>
- To: gcc-patches at gcc dot gnu dot org, richard dot sandiford at arm dot com
- Date: Sat, 16 May 2015 08:09:11 +0200
- Subject: Re: Mostly rewrite genrecog
- Authentication-results: sourceware.org; auth=none
- References: <87egn5yis1 dot fsf at e105548-lin dot cambridge dot arm dot com>
Hi Richard,
I see regressions with the current IBM z13 vector patchset which appear to be related to the new
genrecog.
The following two insn definitions only differ in the mode and predicate of the shift count operand.
(define_insn "lshr<mode>3"
[(set (match_operand:VI 0 "register_operand" "=v")
(lshiftrt:VI (match_operand:VI 1 "register_operand" "v")
(match_operand:SI 2 "shift_count_or_setmem_operand" "Y")))]
"TARGET_VX"
"vesrl<bhfgq>\t%v0,%v1,%Y2"
[(set_attr "op_type" "VRS")])
(define_insn "vlshr<mode>3"
[(set (match_operand:VI 0 "register_operand" "=v")
(lshiftrt:VI (match_operand:VI 1 "register_operand" "v")
(match_operand:VI 2 "register_operand" "v")))]
"TARGET_VX"
"vesrlv<bhfgq>\t%v0,%v1,%v2"
[(set_attr "op_type" "VRR")])
However, the insn-recog.c code only seem to check the predicate. This is a problem since
shift_count_or_setmem_operand does not check the mode.
if (shift_count_or_setmem_operand (operands[2], SImode)
&&
#line 717 "/home3/andreas/patched/../gcc/gcc/config/s390/vector.md"
(TARGET_VX))
return 600; /* lshrv2qi3 */
if (register_operand (operands[2], V2QImode)
&&
#line 747 "/home3/andreas/patched/../gcc/gcc/config/s390/vector.md"
(TARGET_VX))
return 630; /* vlshrv2qi3 */
break;
I could add a mode check to the predicate. However, I just wanted to check whether this change was
intentional.
Bye,
-Andreas-