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[PATCH, AArch64] [4.8] [4.9] Backport PR64304 fix (miscompilation with -mgeneral-regs-only )

This backports the fixes for PR target/64304 , miscompilation with -mgeneral-regs-only, to the 4.8 & 4.9 branch from trunk**  </viewcvs/gcc?view=revision&revision=219844>  r219844.
Tested on x86_64 by using qemu of aarch64.
OK for 4.8 & 4.9 ?

-------------------------------gcc-4.8---------------------------

diff -rupN gcc-4.8-20150226/gcc/ChangeLog
gcc-4.8-20150226.pr64304//gcc/ChangeLog
--- gcc-4.8-20150226/gcc/ChangeLog    2015-03-04 21:13:46.000000000 -0500
+++ gcc-4.8-20150226.pr64304//gcc/ChangeLog    2015-03-04
21:19:49.000000000 -0500
@@ -1,3 +1,13 @@
+2015-03-05  Shanyao Chen<chenshanyao@huawei.com>
+
+        Backported from mainline
+        2015-01-19  Jiong Wang<jiong.wang@arm.com>
+                    Andrew Pinski<apinski@cavium.com>
+
+        PR target/64304
+        * config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"):
Deleted.
+        (ashl<mode>3): Don't expand if operands[2] is not constant.
+
  2015-02-26  Peter Bergner<bergner@vnet.ibm.com>

      Backport from mainline
diff -rupN gcc-4.8-20150226/gcc/config/aarch64/aarch64.md
gcc-4.8-20150226.pr64304//gcc/config/aarch64/aarch64.md
--- gcc-4.8-20150226/gcc/config/aarch64/aarch64.md    2015-03-04
21:14:29.000000000 -0500
+++ gcc-4.8-20150226.pr64304//gcc/config/aarch64/aarch64.md 2015-03-04
21:21:54.000000000 -0500
@@ -2612,6 +2612,8 @@
          DONE;
            }
        }
+    else
+      FAIL;
    }
  )

@@ -2681,16 +2683,6 @@
     (set_attr "mode" "SI")]
  )

-(define_insn "*ashl<mode>3_insn"
-  [(set (match_operand:SHORT 0 "register_operand" "=r")
-    (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r")
-              (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))]
-  ""
-  "lsl\\t%<w>0, %<w>1, %<w>2"
-  [(set_attr "v8type" "shift")
-   (set_attr "mode" "<MODE>")]
-)
-
  (define_insn "*<optab><mode>3_insn"
    [(set (match_operand:SHORT 0 "register_operand" "=r")
      (ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r")
diff -rupN gcc-4.8-20150226/gcc/testsuite/ChangeLog
gcc-4.8-20150226.pr64304//gcc/testsuite/ChangeLog
--- gcc-4.8-20150226/gcc/testsuite/ChangeLog    2015-03-04
21:16:54.000000000 -0500
+++ gcc-4.8-20150226.pr64304//gcc/testsuite/ChangeLog    2015-03-04
21:22:58.000000000 -0500
@@ -1,3 +1,10 @@
+2015-03-05  Shanyao chen<chenshanyao@huawei.com>
+
+        Backported from mainline
+        2015-01-19  Jiong Wang<jiong.wang@arm.com>
+
+        * gcc.target/aarch64/pr64304.c: New testcase.
+
  2015-02-26  Peter Bergner<bergner@vnet.ibm.com>

      Backport from mainline
diff -rupN gcc-4.8-20150226/gcc/testsuite/gcc.target/aarch64/pr64304.c
gcc-4.8-20150226.pr64304//gcc/testsuite/gcc.target/aarch64/pr64304.c
--- gcc-4.8-20150226/gcc/testsuite/gcc.target/aarch64/pr64304.c
1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.8-20150226.pr64304//gcc/testsuite/gcc.target/aarch64/pr64304.c
2015-03-04 21:12:15.000000000 -0500
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+unsigned char byte = 0;
+
+void
+set_bit (unsigned int bit, unsigned char value)
+{
+  unsigned char mask = (unsigned char) (1 << (bit & 7));
+
+  if (! value)
+    byte &= (unsigned char)~mask;
+  else
+    byte |= mask;
+    /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, 7" } } */
+}
+
+/* { dg-final { cleanup-saved-temps } } */
+

-------------------------------gcc-4.9---------------------------

diff -rupN gcc-4.9-20150225/gcc/ChangeLog
gcc-4.9-20150225.pr64304//gcc/ChangeLog
--- gcc-4.9-20150225/gcc/ChangeLog    2015-03-04 20:48:30.000000000 -0500
+++ gcc-4.9-20150225.pr64304//gcc/ChangeLog    2015-03-04
20:55:59.000000000 -0500
@@ -1,3 +1,13 @@
+2015-03-05  Shanyao Chen<chenshanyao@huawei.com>
+
+    Backported from mainline
+    2015-01-19  Jiong Wang<jiong.wang@arm.com>
+            Andrew Pinski<apinski@cavium.com>
+
+    PR target/64304
+    * config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"): Deleted.
+    (ashl<mode>3): Don't expand if operands[2] is not constant.
+
  2015-02-25  Kai Tietz<ktietz@redhat.com>

      PR tree-optimization/61917
diff -rupN gcc-4.9-20150225/gcc/config/aarch64/aarch64.md
gcc-4.9-20150225.pr64304//gcc/config/aarch64/aarch64.md
--- gcc-4.9-20150225/gcc/config/aarch64/aarch64.md    2015-03-04
20:41:03.000000000 -0500
+++ gcc-4.9-20150225.pr64304//gcc/config/aarch64/aarch64.md 2015-03-04
20:46:44.000000000 -0500
@@ -2719,6 +2719,8 @@
          DONE;
            }
        }
+    else
+      FAIL;
    }
  )

@@ -2947,15 +2949,6 @@
    [(set_attr "type" "shift_reg")]
  )

-(define_insn "*ashl<mode>3_insn"
-  [(set (match_operand:SHORT 0 "register_operand" "=r")
-    (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r")
-              (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))]
-  ""
-  "lsl\\t%<w>0, %<w>1, %<w>2"
-  [(set_attr "type" "shift_reg")]
-)
-
  (define_insn "*<optab><mode>3_insn"
    [(set (match_operand:SHORT 0 "register_operand" "=r")
      (ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r")
diff -rupN gcc-4.9-20150225/gcc/testsuite/ChangeLog
gcc-4.9-20150225.pr64304//gcc/testsuite/ChangeLog
--- gcc-4.9-20150225/gcc/testsuite/ChangeLog    2015-03-04
21:00:24.000000000 -0500
+++ gcc-4.9-20150225.pr64304//gcc/testsuite/ChangeLog    2015-03-04
21:03:21.000000000 -0500
@@ -1,3 +1,10 @@
+2015-03-05  Shanyao chen<chenshanyao@huawei.com>
+
+    Backported from mainline
+    2015-01-19  Jiong Wang<jiong.wang@arm.com>
+
+    * gcc.target/aarch64/pr64304.c: New testcase.
+
  2015-02-25  Kai Tietz<ktietz@redhat.com>

      Backported from mainline
diff -rupN gcc-4.9-20150225/gcc/testsuite/gcc.target/aarch64/pr64304.c
gcc-4.9-20150225.pr64304//gcc/testsuite/gcc.target/aarch64/pr64304.c
--- gcc-4.9-20150225/gcc/testsuite/gcc.target/aarch64/pr64304.c
1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.9-20150225.pr64304//gcc/testsuite/gcc.target/aarch64/pr64304.c
2015-03-04 20:59:24.000000000 -0500
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 --save-temps" } */
+
+unsigned char byte = 0;
+
+void
+set_bit (unsigned int bit, unsigned char value)
+{
+  unsigned char mask = (unsigned char) (1 << (bit & 7));
+
+  if (! value)
+    byte &= (unsigned char)~mask;
+  else
+    byte |= mask;
+    /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, 7" } } */
+}
+
+/* { dg-final { cleanup-saved-temps } } */
+

Attachment: pr64304-backport-4.8.patch
Description: Text document

Attachment: pr64304-backport-4.9.patch
Description: Text document

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