Re: [PATCH, rs6000, testsuite] Changes for unaligned vector load/store support on POWER8

[David Edelsohn <dje dot gcc at gmail dot com>]

On Tue, Feb 10, 2015 at 8:18 PM, Bill Schmidt
<wschmidt@linux.vnet.ibm.com> wrote:
> Hi David,
>
> Sorry I haven't gotten back to this sooner.  I've tried to address your
> comments about the previous patch.  Please let me know if I'm off base.
> Test results are the same as previously.
>
> Thanks,
> Bill
>
>
> [gcc]
>
> 2015-02-10  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
>
>         * config/rs6000/rs6000.c (rs6000_option_override_internal):  For
>         VSX + POWER8, enable TARGET_ALLOW_MOVMISALIGN and
>         TARGET_EFFICIENT_UNALIGNED_VSX if not selected by command line
>         option.
>         (rs6000_builtin_mask_for_load): Return 0 for targets with
>         efficient unaligned VSX accesses so that the vectorizer will use
>         direct unaligned loads.
>         (rs6000_builtin_support_vector_misalignment): Always return true
>         for targets with efficient unaligned VSX accesses.
>         (rs6000_builtin_vectorization_cost): Cost of unaligned loads and
>         stores on targets with efficient unaligned VSX accesses is almost
>         always the same as the cost of an aligned load or store, so model
>         it that way.
>         * config/rs6000/rs6000.opt (mefficient-unaligned-vector): New
>         undocumented option.
>
> [gcc/testsuite]
>
> 2015-02-10  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
>
>         * gcc.dg/vect/bb-slp-24.c: Exclude test for POWER8.
>         * gcc.dg/vect/bb-slp-25.c: Likewise.
>         * gcc.dg/vect/bb-slp-29.c: Likewise.
>         * gcc.dg/vect/bb-slp-32.c: Replace vect_no_align with
>         vect_no_align && { ! vect_hw_misalign }.
>         * gcc.dg/vect/bb-slp-9.c: Likewise.
>         * gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c: Exclude test for
>         vect_hw_misalign.
>         * gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c: Likewise.
>         * gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c: Adjust tests to
>         account for POWER8, where peeling for alignment is not needed.
>         * gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c: Replace
>         vect_no_align with vect_no_align && { ! vect_hw_misalign }.
>         * gcc.dg.vect.if-cvt-stores-vect-ifcvt-18.c: Likewise.
>         * gcc.dg/vect/no-scevccp-outer-6-global.c: Likewise.
>         * gcc.dg/vect/no-scevccp-outer-6.c: Likewise.
>         * gcc.dg/vect/no-vfa-vect-43.c: Likewise.
>         * gcc.dg/vect/no-vfa-vect-57.c: Likewise.
>         * gcc.dg/vect/no-vfa-vect-61.c: Likewise.
>         * gcc.dg/vect/no-vfa-vect-depend-1.c: Likewise.
>         * gcc.dg/vect/no-vfa-vect-depend-2.c: Likewise.
>         * gcc.dg/vect/no-vfa-vect-depend-3.c: Likewise.
>         * gcc.dg/vect/pr16105.c: Likewise.
>         * gcc.dg/vect/pr20122.c: Likewise.
>         * gcc.dg/vect/pr33804.c: Likewise.
>         * gcc.dg/vect/pr33953.c: Likewise.
>         * gcc.dg/vect/pr56787.c: Likewise.
>         * gcc.dg/vect/pr58508.c: Likewise.
>         * gcc.dg/vect/slp-25.c: Likewise.
>         * gcc.dg/vect/vect-105-bit-array.c: Likewise.
>         * gcc.dg/vect/vect-105.c: Likewise.
>         * gcc.dg/vect/vect-27.c: Likewise.
>         * gcc.dg/vect/vect-29.c: Likewise.
>         * gcc.dg/vect/vect-33.c: Exclude unaligned access test for
>         POWER8.
>         * gcc.dg/vect/vect-42.c: Replace vect_no_align with vect_no_align
>         && { ! vect_hw_misalign }.
>         * gcc.dg/vect/vect-44.c: Likewise.
>         * gcc.dg/vect/vect-48.c: Likewise.
>         * gcc.dg/vect/vect-50.c: Likewise.
>         * gcc.dg/vect/vect-52.c: Likewise.
>         * gcc.dg/vect/vect-56.c: Likewise.
>         * gcc.dg/vect/vect-60.c: Likewise.
>         * gcc.dg/vect/vect-72.c: Likewise.
>         * gcc.dg/vect/vect-75-big-array.c: Likewise.
>         * gcc.dg/vect/vect-75.c: Likewise.
>         * gcc.dg/vect/vect-77-alignchecks.c: Likewise.
>         * gcc.dg/vect/vect-77-global.c: Likewise.
>         * gcc.dg/vect/vect-78-alignchecks.c: Likewise.
>         * gcc.dg/vect/vect-78-global.c: Likewise.
>         * gcc.dg/vect/vect-93.c: Likewise.
>         * gcc.dg/vect/vect-95.c: Likewise.
>         * gcc.dg/vect/vect-96.c: Likewise.
>         * gcc.dg/vect/vect-cond-1.c: Likewise.
>         * gcc.dg/vect/vect-cond-3.c: Likewise.
>         * gcc.dg/vect/vect-cond-4.c: Likewise.
>         * gcc.dg/vect/vect-cselim-1.c: Likewise.
>         * gcc.dg/vect/vect-multitypes-1.c: Likewise.
>         * gcc.dg/vect/vect-multitypes-3.c: Likewise.
>         * gcc.dg/vect/vect-multitypes-4.c: Likewise.
>         * gcc.dg/vect/vect-multitypes-6.c: Likewise.
>         * gcc.dg/vect/vect-nest-cycle-1.c: Likewise.
>         * gcc.dg/vect/vect-nest-cycle-2.c: Likewise.
>         * gcc.dg/vect/vect-outer-3a-big-array.c: Likewise.
>         * gcc.dg/vect/vect-outer-3a.c: Likewise.
>         * gcc.dg/vect/vect-outer-5.c: Likewise.
>         * gcc.dg/vect/vect-outer-fir-big-array.c: Likewise.
>         * gcc.dg/vect/vect-outer-fir-lb-big-array.c: Likewise.
>         * gcc.dg/vect/vect-outer-fir-lb.c: Likewise.
>         * gcc.dg/vect/vect-outer-fir.c: Likewise.
>         * gcc.dg/vect/vect-peel-3.c: Likewise.
>         * gcc.dg/vect/vect-peel-4.c: Likewise.
>         * gcc.dg/vect/vect-pre-interact.c: Likewise.
>         * gcc.target/powerpc/vsx-vectorize-2.c: Exclude test for POWER8.
>         * gcc.target/powerpc/vsx-vectorize-4.c: Likewise.
>         * gcc.target/powerpc/vsx-vectorize-6.c: Likewise.
>         * gcc.target/powerpc/vsx-vectorize-7.c: Likewise.
>         * gfortran.dg/vect/vect-2.f90: Replace vect_no_align with
>         vect_no_align && { ! vect_hw_misalign }.
>         * gfortran.dg/vect/vect-3.f90: Likewise.
>         * gfortran.dg/vect/vect-4.f90: Likewise.
>         * gfortran.dg/vect/vect-5.f90: Likewise.
>         * lib/target-supports.exp (check_effective_target_vect_no_align):
>         Return 1 for POWER8.
>         (check_effective_target_vect_hw_misalign): Return 1 for POWER8.

This is much more what I had in mind.

My one concern is the interaction between TARGET_ALLOW_MOVMISALIGN and
TARGET_EFFICIENT_UNALIGNED_VSX in the movmisalign<mode> pattern in
vector.md.  Your patch changes
rs6000_builtin_support_vector_misalignment to return TRUE if
TARGET_EFFICIENT_UNALIGNED_VSX is enabled, which seems to enable the
use of the movmisalign<mode> pattern, but the pattern final condition
depends on TARGET_ALLOW_MOVMISALIGN.

-mcpu=power8 will enable both flags, but if a user manually overrides
one or both flags, the hook could return TRUE while the pattern is
disabled, which would lead to an ICE.  The relationship between the
hook and the pattern need to be consistent.  I'm not sure about the
best way to rationalize it.

Thanks, David