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Re: [PATCH] Reenable CSE of non-volatile inline asm (PR rtl-optimization/63637)
- From: Jakub Jelinek <jakub at redhat dot com>
- To: Richard Biener <richard dot guenther at gmail dot com>
- Cc: Jeff Law <law at redhat dot com>, Segher Boessenkool <segher at kernel dot crashing dot org>, Richard Biener <rguenther at suse dot de>, Eric Botcazou <ebotcazou at adacore dot com>, gcc-patches at gcc dot gnu dot org
- Date: Thu, 15 Jan 2015 09:43:47 +0100
- Subject: Re: [PATCH] Reenable CSE of non-volatile inline asm (PR rtl-optimization/63637)
- Authentication-results: sourceware.org; auth=none
- References: <20150113163840 dot GA4183 at gate dot crashing dot org> <54B575D7 dot 8030107 at redhat dot com> <20150113201322 dot GJ1405 at tucnak dot redhat dot com> <54B59964 dot 7070707 at redhat dot com> <20150114000315 dot GA32710 at gate dot crashing dot org> <54B609A9 dot 9090800 at redhat dot com> <20150114151906 dot GA21784 at gate dot crashing dot org> <54B74AD9 dot 4010905 at redhat dot com> <DE331E6C-39D7-4F70-9E25-A3A4F7F49640 at gmail dot com> <20150115081330 dot GB1405 at tucnak dot redhat dot com>
- Reply-to: Jakub Jelinek <jakub at redhat dot com>
On Thu, Jan 15, 2015 at 09:13:30AM +0100, Jakub Jelinek wrote:
> differently. Just trying to grep for a few:
> glibc:
> ./sysdeps/alpha/bits/atomic.h:# define atomic_full_barrier() __asm ("mb" : : : "memory");
> ./sysdeps/alpha/bits/atomic.h:# define atomic_read_barrier() __asm ("mb" : : : "memory");
> ./sysdeps/alpha/bits/atomic.h:# define atomic_write_barrier() __asm ("wmb" : : : "memory");
> ./sysdeps/sparc/sparc32/bits/atomic.h:# define atomic_full_barrier() __asm ("" ::: "memory")
> ./sysdeps/powerpc/powerpc32/bits/atomic.h:# define atomic_read_barrier() __asm ("lwsync" ::: "memory")
> ./sysdeps/powerpc/powerpc32/bits/atomic.h:# define atomic_read_barrier() __asm ("sync" ::: "memory")
> ./sysdeps/powerpc/powerpc64/bits/atomic.h:#define atomic_read_barrier() __asm ("lwsync" ::: "memory")
> ./sysdeps/powerpc/bits/atomic.h:#define atomic_full_barrier() __asm ("sync" ::: "memory")
> ./sysdeps/powerpc/bits/atomic.h:#define atomic_write_barrier() __asm ("eieio" ::: "memory")
> ./sysdeps/generic/malloc-machine.h:# define atomic_full_barrier() __asm ("" ::: "memory")
> ./elf/tst-tlsmod3.c: asm ("" ::: "memory");
> ./elf/tst-tlsmod4.c: asm ("" ::: "memory");
> ./elf/tst-tlsmod1.c: asm ("" ::: "memory");
> ./elf/tst-tlsmod2.c: asm ("" ::: "memory");
> ./include/atomic.h:# define atomic_full_barrier() __asm ("" ::: "memory")
> linux kernel:
> ./arch/arm/mach-omap2/pm24xx.c: asm("mcr p15, 0, %0, c7, c0, 4" : : "r" (zero) : "memory", "cc");
> ./arch/arm/include/asm/irqflags.h:#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
> ./arch/arm/include/asm/irqflags.h:#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
> ./arch/x86/include/asm/uaccess_64.h: asm("":::"memory");
> ./arch/x86/include/asm/uaccess_64.h: asm("":::"memory");
> ./arch/x86/include/asm/segment.h: asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
> ./arch/x86/include/asm/stackprotector.h: asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");
> ./arch/arm64/include/asm/irqflags.h:#define local_fiq_enable() asm("msr daifclr, #1" : : : "memory")
> ./arch/arm64/include/asm/irqflags.h:#define local_fiq_disable() asm("msr daifset, #1" : : : "memory")
> ./arch/arm64/include/asm/irqflags.h:#define local_async_enable() asm("msr daifclr, #4" : : : "memory")
> ./arch/arm64/include/asm/irqflags.h:#define local_async_disable() asm("msr daifset, #4" : : : "memory")
> ./arch/tile/lib/memcpy_64.c: __asm__ ("" : : : "memory");
> ./arch/tile/lib/memcpy_64.c: __asm__ ("" : : : "memory");
> ./arch/tile/include/hv/netio_intf.h: __asm__("" : : : "memory");
> ./drivers/net/ethernet/sgi/ioc3-eth.c: __asm__("sync" ::: "memory")
> ./lib/sha1.c: #define setW(x, val) do { W(x) = (val); __asm__("":::"memory"); } while (0)
Oops, bad grep, only the
./arch/x86/include/asm/segment.h: asm("mov %%" #seg ",%0":"=r" (value) : : "memory")
is what we are talking about actually, asm without outputs is implicitly
volatile.
Jakub