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Re: [patch] Fix ICE on unaligned record field
- From: Eric Botcazou <ebotcazou at adacore dot com>
- To: gcc-patches at gcc dot gnu dot org
- Cc: Richard Biener <richard dot guenther at gmail dot com>
- Date: Thu, 11 Dec 2014 22:52:05 +0100
- Subject: Re: [patch] Fix ICE on unaligned record field
- Authentication-results: sourceware.org; auth=none
- References: <3887233 dot jQSJCmu5YU at polaris> <20141203140207 dot GL8214 at virgil dot suse> <CAFiYyc1VmE=3oRK58bDC_uXmsnuSmEYuG5ARsVQ56dxswLeQWA at mail dot gmail dot com>
> Note that I think the place of the check is unfortunate as you for example
> will not remove the argument if it is unused. In fact I'm not yet sure
> what transform exactly we are disabling. I am guessing we are
> passing an aggregate by value that resides at a bit-aligned offset
> of some outer object:
>
> foo (x.aggr);
>
> and the function then does
>
> foo (Aggr a)
> {
> int i = a.foo;
> ...
> }
>
> thus use only a part of the aggregate. Then IPA SRA would like to
> pass x.aggr.foo instead of x.aggr and thus tries to materialize a
> load from x.aggr.foo at all callers but fails to do that in a valid way.
Right, it's the usual MEM_EXPR business creating ADDR_EXPRs out of nowhere and
miserably failing on something not addressable.
> Erics fix did, at all callers
>
> Aggr tem = x.aggr;
> foo (tem.foo);
>
> ?
Yes, because the code wants to take &tem afterwards.
> While we should be able to simply do
>
> foo (BIT_FIELD_REF <x.aggr, .....>)
>
> with the appropriate bit offset and size? (if that's of register type
> you need to do the load in a separate stmt of couse).
>
> Thus similar to Erics fix but avoiding the aggregate copy.
Yes, that should be doable, but I'm not sure it's worth the hassle.
--
Eric Botcazou