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On 02 Dec 12:21, Uros Bizjak wrote: > On Tue, Dec 2, 2014 at 12:08 PM, Ilya Enkovich <enkovich.gnu@gmail.com> wrote: > > >> > Having stage1 close to end, may we make some decision regarding this > >> > patch? Having a couple of working variants, may we choose and use one > >> > of them? > >> > >> I propose to wait for Vlad for an update about his plans on register > >> preference algorythm that would fix this (and other "Ya*r"-type > >> issues). > >> > >> In the absence of the fix, we'll go with "Yr,*x". > >> > >> Uros. > >> > > > > Hi, > > > > Here is an updated patch which uses "Yr,*x" option to avoid long prefixes for Silvermont. Bootstrapped and tested on x86_64-unknown-linux-gnu. OK for trunk? > > > > Thanks, > > Ilya > > -- > > gcc/ > > > > 2014-12-02 Ilya Enkovich <ilya.enkovich@intel.com> > > > > * config/i386/constraints.md (Yr): New. > > * config/i386/i386.h (reg_class): Add NO_REX_SSE_REGS. > > (REG_CLASS_NAMES): Likewise. > > (REG_CLASS_CONTENTS): Likewise. > > * config/i386/sse.md (*vec_concatv2sf_sse4_1): Add alternatives > > which use only NO_REX_SSE_REGS. > > (vec_set<mode>_0): Likewise. > > (*vec_setv4sf_sse4_1): Likewise. > > (sse4_1_insertps): Likewise. > > (*sse4_1_extractps): Likewise. > > (*sse4_1_mulv2siv2di3<mask_name>): Likewise. > > (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise. > > (*sse4_1_<code><mode>3<mask_name>): Likewise. > > (*sse4_1_<code><mode>3): Likewise. > > (*sse4_1_eqv2di3): Likewise. > > (sse4_2_gtv2di3): Likewise. > > (*vec_extractv4si): Likewise. > > (*vec_concatv2si_sse4_1): Likewise. > > (vec_concatv2di): Likewise. > > (<sse4_1>_blend<ssemodesuffix><avxsizesuffix>): Likewise. > > (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>): Likewise. > > (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise. > > (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise. > > (<sse4_1_avx2>_mpsadbw): Likewise. > > (<sse4_1_avx2>packusdw<mask_name>): Likewise. > > (<sse4_1_avx2>_pblendvb): Likewise. > > (sse4_1_pblendw): Likewise. > > (sse4_1_phminposuw): Likewise. > > (sse4_1_<code>v8qiv8hi2<mask_name>): Likewise. > > (sse4_1_<code>v4qiv4si2<mask_name>): Likewise. > > (sse4_1_<code>v4hiv4si2<mask_name>): Likewise. > > (sse4_1_<code>v2qiv2di2<mask_name>): Likewise. > > (sse4_1_<code>v2hiv2di2<mask_name>): Likewise. > > (sse4_1_<code>v2siv2di2<mask_name>): Likewise. > > (sse4_1_ptest): Likewise. > > (<sse4_1>_round<ssemodesuffix><avxsizesuffix>): Likewise. > > (sse4_1_round<ssescalarmodesuffix>): Likewise. > > * config/i386/subst.md (mask_prefix4): New. > > * config/i386/x86-tune.def (X86_TUNE_AVOID_4BYTE_PREFIXES): New. > > > > gcc/testsuites/ > > > > 2014-12-02 Ilya Enkovich <ilya.enkovich@intel.com> > > > > * gcc.target/i386/sse2-init-v2di-2.c: Adjust to changed > > vec_concatv2di template. > > OK for mainline with a change below. > > @@ -6544,13 +6550,14 @@ > }) > > (define_insn_and_split "*sse4_1_extractps" > - [(set (match_operand:SF 0 "nonimmediate_operand" "=rm,x,x") > + [(set (match_operand:SF 0 "nonimmediate_operand" "=*rm,rm,x,x") > (vec_select:SF > > Please do not change preferences of non-SSE registers. Please check > the patch that similar changes didn't creep in. > > Thanks, > Uros. Thanks for review! Didn't find any other typo. Attached is a committed version. Thanks, Ilya
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