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Re: [RFC: AArch64] Parametrically set defaults for function and jump alignment
- From: Ramana Radhakrishnan <ramana dot gcc at googlemail dot com>
- To: Marcus Shawcroft <marcus dot shawcroft at gmail dot com>
- Cc: James Greenhalgh <james dot greenhalgh at arm dot com>, Andrew Pinski <pinskia at gmail dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Fri, 14 Nov 2014 11:31:44 +0000
- Subject: Re: [RFC: AArch64] Parametrically set defaults for function and jump alignment
- Authentication-results: sourceware.org; auth=none
- References: <1415961336-1986-1-git-send-email-james dot greenhalgh at arm dot com> <CA+=Sn1meBqrbAmHsVP8-d4ZDtzsrr0NwenAV+V-tJzDF3m7JDg at mail dot gmail dot com> <20141114105049 dot GA2047 at arm dot com> <CAFqB+Pyon4F8QQpYB_by614+dTObOY_1toK6MThu3Lp7KCB=pw at mail dot gmail dot com>
- Reply-to: ramrad01 at arm dot com
On Fri, Nov 14, 2014 at 11:11 AM, Marcus Shawcroft
<marcus.shawcroft@gmail.com> wrote:
> On 14 November 2014 10:50, James Greenhalgh <james.greenhalgh@arm.com> wrote:
>> On Fri, Nov 14, 2014 at 10:42:27AM +0000, Andrew Pinski wrote:
>>> On Fri, Nov 14, 2014 at 2:35 AM, James Greenhalgh
>>> <james.greenhalgh@arm.com> wrote:
>>> >
>>> > Hi,
>>> >
>>> > We currently do not set any interesting default values for jump and function
>>> > alignment in AArch64. I've made the formula for these values derive from
>>> > the issue rate of the processor as so:
>>> >
>>> > jumps: 4 * processor issue-rate (rounded down to nearest power of two)
>>> > functions: 4 * processor issue-rate (rounded up to nearest power of two)
>>> >
>>> > This is sensible for the ARMv8-a implementations I tested on. An
>>> > alternative patch would make these values new fields in the tuning
>>> > tables.
>>>
>>> I had submitted an alternative patch a few hours ago which allows the
>>> tuning structure say what alignment is wanted for all three:
>>> https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01615.html
>>
>> D'oh! I should have flicked through gcc-patches before hitting send!
>> I imagine I'm encoding similar logic to that you used when writing
>> this patch.
>>
>> I'm happy with either approach, so I'll leave it to the maintainers to
>> decide which they prefer.
>
> I think Andrews approach of making it adjustable per core makes sense.
> Andrew can you split the alignment part of your patch from the fusion
> part of your patch?
FWIW, I agree parameterizing this off issue width appears an interesting metric
but having a handle on these independently would probably be more
useful in the long run. And I think it would make sense for generic to have
8 bytes alignment where sensible.
I'm not sure about align-loops from benchmarking experiments in AArch32 land
a couple of years ago. IIRC it was very hard to stop the compiler from
just willy
nilly inserting too many nops. The situation in A64 may be different to this but
doesn't sound like it from James's experimentation so far.
Ramana
>
> Cheers
> /Marcus