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[PATCH][AArch64] Use std::swap instead of manually swapping
- From: Kyrill Tkachov <kyrylo dot tkachov at arm dot com>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>, Marcus Shawcroft <marcus dot shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Thu, 13 Nov 2014 09:42:27 +0000
- Subject: [PATCH][AArch64] Use std::swap instead of manually swapping
- Authentication-results: sourceware.org; auth=none
Hi all,
Following the trend in i386 and alpha, this patch uses std::swap to
perform swapping of values in the aarch64 backend instead of declaring
temporaries.
Tested and bootstrapped on aarch64-linux.
Ok for trunk?
Thanks,
Kyrill
2014-11-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_evpc_ext): Use std::swap instead
of manual swapping implementation.
(aarch64_expand_vec_perm_const_1): Likewise.
commit 20ce59f52c26f99ad3939597c5cd41a0cdc8a751
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Wed Nov 12 15:41:05 2014 +0000
[AArch64] Use std::swap
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index d1f5673..f92b23a 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -9428,9 +9428,7 @@ aarch64_evpc_ext (struct expand_vec_perm_d *d)
/* After setup, we want the high elements of the first vector (stored
at the LSB end of the register), and the low elements of the second
vector (stored at the MSB end of the register). So swap. */
- rtx temp = d->op0;
- d->op0 = d->op1;
- d->op1 = temp;
+ std::swap (d->op0, d->op1);
/* location != 0 (above), so safe to assume (nelt - location) < nelt. */
location = nelt - location;
}
@@ -9601,15 +9599,12 @@ aarch64_expand_vec_perm_const_1 (struct expand_vec_perm_d *d)
if (d->perm[0] >= d->nelt)
{
unsigned i, nelt = d->nelt;
- rtx x;
gcc_assert (nelt == (nelt & -nelt));
for (i = 0; i < nelt; ++i)
d->perm[i] ^= nelt; /* Keep the same index, but in the other vector. */
- x = d->op0;
- d->op0 = d->op1;
- d->op1 = x;
+ std::swap (d->op0, d->op1);
}
if (TARGET_SIMD)