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[PATCH, i686] Fix for asan test failures with -m32 happened after EBX enabling in PIC mode
- From: "Zamyatin, Igor" <igor dot zamyatin at intel dot com>
- To: "GCC Patches (gcc-patches at gcc dot gnu dot org)" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 31 Oct 2014 15:34:21 +0000
- Subject: [PATCH, i686] Fix for asan test failures with -m32 happened after EBX enabling in PIC mode
- Authentication-results: sourceware.org; auth=none
Hi!
Following patch (moving initialization of pic_offset_table_rtx earlier) fixes failures for asan tests on 32 bits in PIC mode mentioned here - https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63534#c48
Bootstrapped/regtested on x86_64, i686
Is it ok for trunk?
ChangeLog:
2014-10-30 Igor Zamyatin <igor.zamyatin@intel.com>
* function.c (assign_parms): Move init of pic_offset_table_rtx
from here to...
* cfgexpand.c (expand_used_vars): ...here.
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 9bd6135..cf7d94a 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -1718,6 +1718,11 @@ expand_used_vars (void)
init_vars_expansion ();
+ /* Initialize pic_offset_table_rtx with a pseudo register
+ if required. */
+ if (targetm.use_pseudo_pic_reg ())
+ pic_offset_table_rtx = gen_reg_rtx (Pmode);
+
hash_map<tree, tree> ssa_name_decls;
for (i = 0; i < SA.map->num_partitions; i++)
{
diff --git a/gcc/function.c b/gcc/function.c
index 1ef43c4..0bbcbbb 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -3464,11 +3464,6 @@ assign_parms (tree fndecl)
fnargs.release ();
- /* Initialize pic_offset_table_rtx with a pseudo register
- if required. */
- if (targetm.use_pseudo_pic_reg ())
- pic_offset_table_rtx = gen_reg_rtx (Pmode);
-
/* Output all parameter conversion instructions (possibly including calls)
now that all parameters have been copied out of hard registers. */
emit_insn (all.first_conversion_insn);