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Re: [PATCH] Add zero-overhead looping for xtensa backend
- From: "augustine dot sterling at gmail dot com" <augustine dot sterling at gmail dot com>
- To: "Yangfei (Felix)" <felix dot yang at huawei dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Felix Yang <fei dot yang0953 at gmail dot com>
- Date: Thu, 23 Oct 2014 23:33:23 -0700
- Subject: Re: [PATCH] Add zero-overhead looping for xtensa backend
- Authentication-results: sourceware.org; auth=none
- References: <CAFc0fxw_SrT8c5y=Ly+X98UhN5_P1bAjMg3n0K06fxAv0ioebg at mail dot gmail dot com> <CAGSvup-V3h1EoZ3D31BEc7Gq0F=YEYJD1GmH+_UipVjNCe=HyQ at mail dot gmail dot com> <CAFc0fxzHg4OktbyTy9341Joubf+A6E3XRj-oCS8WzgVp4pw9mw at mail dot gmail dot com> <CAFc0fxwh7Ey2XFRpbSVNQpQ7RUwcQgGCYHMFB=Yo=6ci261prQ at mail dot gmail dot com> <DA41BE1DDCA941489001C7FBD7A8820E54A354E4 at szxema507-mbx dot china dot huawei dot com> <CAGSvup9qUfTfYOm6FyUcDFeKp4dJtFMjWaC+XnjT6Ca+OqYguA at mail dot gmail dot com> <CAFc0fxxXWa603e0r29WjkSGN7T5JAQ5WZq6iKW46zfvWhou7Dw at mail dot gmail dot com> <CAFc0fxwXVkSf0---P42kdXWR7ibr02uOaiiz8L9Kc=fHTxWY1w at mail dot gmail dot com> <CAGSvup9EP3Vy5f+G_jCKMHPG7t5k6+JZZxE+=HAetXYEusYOeg at mail dot gmail dot com> <CAFc0fxyWfZdiLA7NxK2Zhj5bkdbSg9UOsVVHs5yOp5zSj3Kx0g at mail dot gmail dot com> <CAFc0fxxtvgu39njZ76HAZwgExn7Q+60ycqR+6+toS=+JwaMe+g at mail dot gmail dot com> <CAGSvup-Zd462JYy5kWPn46w28zYajzuaF7YcMS0-7ddyLHx+LQ at mail dot gmail dot com> <DA41BE1DDCA941489001C7FBD7A8820E555490E3 at szxema507-mbx dot china dot huawei dot com> <CAGSvup9g0Wu1JNRVF-GOVJPYiM9wj3s5xsHcug=Bt4-_+uFv8g at mail dot gmail dot com> <DA41BE1DDCA941489001C7FBD7A8820E5554B367 at szxema507-mbx dot china dot huawei dot com> <CAGSvup8Mq9G3EaAWb6r1E8-FntBjVqtkfVqzGLnS5Xg8si2AhQ at mail dot gmail dot com> <DA41BE1DDCA941489001C7FBD7A8820E5554BB0E at szxema507-mbx dot china dot huawei dot com> <CAGSvup_O+c4n6rWFgitQ8=jC7vEuqcZNday_JKHjU=ox16GEpA at mail dot gmail dot com> <DA41BE1DDCA941489001C7FBD7A8820E5554BB60 at szxema507-mbx dot china dot huawei dot com>
I mean without your patch at all.
On Thu, Oct 23, 2014 at 11:30 PM, Yangfei (Felix) <felix.yang@huawei.com> wrote:
>>
>> On Thu, Oct 23, 2014 at 9:12 PM, Yangfei (Felix) <felix.yang@huawei.com> wrote:
>> >> Here the key point is we need a general purpose register for the "loop"
>> >> instruction.
>>
>> So the question to ask here is, "How does this work today, without loop
>> instructions?" Somehow--even when it has been spilled--a branch instruction can
>> test the trip count. There should be no difference.
>>
>> >> And we cannot use zero-cost looping in this situation.
>> >> And that's why I spilt the zero_cost_loop_end into a normal test and branch.
>>
>> > Also note that the hwloop_pattern_reg interface also expects a general
>> purpose register in the doloop_end pattern.
>>
>> If there were no loop instruction, how would this work?
>
>
> Just take a look at my patch. I handle this in the new define_split:
>
> +(define_split
> + [(set (pc)
> + (if_then_else (ne (match_operand:SI 0 "nonimmediate_operand" "")
> + (const_int 1))
> + (label_ref (match_operand 1 "" ""))
> + (pc)))
> + (set (match_operand:SI 2 "nonimmediate_operand" "")
> + (plus:SI (match_dup 0)
> + (const_int -1)))
> + (unspec [(const_int 0)] UNSPEC_LSETUP_END)
> + (clobber (match_scratch 3))]
> + "TARGET_LOOPS && optimize && reload_completed"
> + [(const_int 0)]
> +{
> + if (!REG_P (operands[0]))
> + {
> + rtx test;
> +
> + /* Fallback into a normal conditional branch insn. */
> + emit_move_insn (operands[3], operands[0]);
> + emit_insn (gen_addsi3 (operands[3], operands[3], constm1_rtx));
> + emit_move_insn (operands[0], operands[3]);
> + test = gen_rtx_NE (VOIDmode, operands[3], const0_rtx);
> + emit_jump_insn (gen_cbranchsi4 (test, operands[3],
> + const0_rtx, operands[1]));
> + }
> + else
> + {
> + emit_jump_insn (gen_loop_end (operands[0], operands[1], operands[2]));
> + }
> +
> + DONE;
> +})