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Re: [PATCH] Generate more efficient memory barriers for LEON3
- From: Eric Botcazou <ebotcazou at adacore dot com>
- To: Daniel Cederman <cederman at gaisler dot com>
- Cc: gcc-patches at gcc dot gnu dot org, Software <software at gaisler dot com>
- Date: Thu, 10 Jul 2014 11:37:36 +0200
- Subject: Re: [PATCH] Generate more efficient memory barriers for LEON3
- Authentication-results: sourceware.org; auth=none
- References: <53AAB0AF dot 5060802 at gaisler dot com>
> The memory barriers generated for SPARC are targeting the weakest memory
> model allowed for SPARC.
That's not quite true, they are targeting the sparc_memory_model, which is the
memory model selected for the architecture/OS pair by default and which can be
overridden by the user with -mmemory-model=[default|rmo|pso|tso|sc].
> The LEON3/4 SPARC processors are using a stronger memory model and thus have
> less requirements on the memory barriers.
My understanding is that they use TSO, in which case...
> For LEON3/4, StoreStore is compiler-only, instead of "stbar",
..."stdbar" should never be generated since #StoreStore is implied by TSO.
> and StoreLoad can be achieved with a normal byte write "stb", instead of
> an atomic byte read-write "ldstub".
OK, thanks. Does this result in a significance performance gain?
> The provided patch changes the previously mentioned memory barriers for
I think that only the membar_storeload_leon3 pattern is necessary. Couple of
more nits: the new pattern is not "multi", it's "store" and you need to add:
to the original membar_storeload since TARGET_LEON3 is also TARGET_V8.