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Re: combination of read/write and earlyclobber constraint modifier


On 02-07-14 08:23, Marc Glisse wrote:
In the first example you gave, looking at the pattern (no match_dup, setting the
full register), it seems that it may have wanted "=&" instead of "+&".

[ move discussion from gcc ml to gcc-patches ml ]

Marcus,

The +& constraint on operand 0 of vec_unpack_trunc_<mode> seems wrong, since the template does not use the operand as input.

This patch fixes that.

OK for trunk if aarch64 build & regtest succeeds ?

Thanks,
- Tom


2014-07-02  Tom de Vries  <tom@codesourcery.com>

	* config/aarch64/aarch64-simd.md
	(define_insn "vec_unpack_trunc_<mode>"): Fix constraint.

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 1c32f0c..0377de4 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -1018,7 +1018,7 @@
 ;; For quads.
 
 (define_insn "vec_pack_trunc_<mode>"
- [(set (match_operand:<VNARROWQ2> 0 "register_operand" "+&w")
+ [(set (match_operand:<VNARROWQ2> 0 "register_operand" "=&w")
        (vec_concat:<VNARROWQ2>
 	 (truncate:<VNARROWQ> (match_operand:VQN 1 "register_operand" "w"))
 	 (truncate:<VNARROWQ> (match_operand:VQN 2 "register_operand" "w"))))]
-- 
1.9.1


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