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[PATCH] [ARM] Post-indexed addressing for NEON memory access
- From: Charles Baylis <charles dot baylis at linaro dot org>
- To: GCC Patches <gcc-patches at gcc dot gnu dot org>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, Ramana Radhakrishnan <Ramana dot Radhakrishnan at arm dot com>
- Date: Mon, 2 Jun 2014 17:47:19 +0100
- Subject: [PATCH] [ARM] Post-indexed addressing for NEON memory access
- Authentication-results: sourceware.org; auth=none
This patch adds support for post-indexed addressing for NEON structure
memory accesses.
For example VLD1.8 {d0}, [r0], r1
Bootstrapped and checked on arm-unknown-gnueabihf using Qemu.
Ok for trunk?
gcc/Changelog:
2014-06-02 Charles Baylis <charles.baylis@linaro.org>
* config/arm/arm.c (neon_vector_mem_operand): Allow register
POST_MODIFY for neon loads and stores.
(arm_print_operand): Output post-index register for neon loads and
stores.
From a8e0bdbceab00d5e5b655611965d3975ba74365c Mon Sep 17 00:00:00 2001
From: Charles Baylis <charles.baylis@linaro.org>
Date: Tue, 6 May 2014 15:23:46 +0100
Subject: [PATCH] post-indexed addressing for vld/vst
2014-05-09 Charles Baylis <charles.baylis@linaro.org>
* config/arm/arm.c (neon_vector_mem_operand): Allow register
POST_MODIFY for neon loads and stores.
(arm_print_operand): Output post-index register for neon loads and
stores.
---
gcc/config/arm/arm.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 1117bd4..6ab02ef 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -12786,7 +12786,11 @@ neon_vector_mem_operand (rtx op, int type, bool strict)
|| (type == 0 && GET_CODE (ind) == PRE_DEC))
return arm_address_register_rtx_p (XEXP (ind, 0), 0);
- /* FIXME: vld1 allows register post-modify. */
+ /* Allow post-increment by register for VLDn */
+ if (type == 2 && GET_CODE (ind) == POST_MODIFY
+ && GET_CODE (XEXP (ind, 1)) == PLUS
+ && REG_P (XEXP (XEXP (ind, 1), 1)))
+ return true;
/* Match:
(plus (reg)
@@ -21816,6 +21820,7 @@ arm_print_operand (FILE *stream, rtx x, int code)
{
rtx addr;
bool postinc = FALSE;
+ rtx postinc_reg = NULL;
unsigned align, memsize, align_bits;
gcc_assert (MEM_P (x));
@@ -21825,6 +21830,11 @@ arm_print_operand (FILE *stream, rtx x, int code)
postinc = 1;
addr = XEXP (addr, 0);
}
+ if (GET_CODE (addr) == POST_MODIFY)
+ {
+ postinc_reg = XEXP( XEXP (addr, 1), 1);
+ addr = XEXP (addr, 0);
+ }
asm_fprintf (stream, "[%r", REGNO (addr));
/* We know the alignment of this access, so we can emit a hint in the
@@ -21850,6 +21860,8 @@ arm_print_operand (FILE *stream, rtx x, int code)
if (postinc)
fputs("!", stream);
+ if (postinc_reg)
+ asm_fprintf (stream, ", %r", REGNO (postinc_reg));
}
return;
--
1.9.1