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Re: [PATCH][MIPS] P5600 scheduling
- From: Richard Sandiford <rdsandiford at googlemail dot com>
- To: Jaydeep Patil <Jaydeep dot Patil at imgtec dot com>
- Cc: Rich Fuhler <Rich dot Fuhler at imgtec dot com>, Matthew Fortune <Matthew dot Fortune at imgtec dot com>, "gcc-patches\ at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 22 May 2014 15:58:22 +0100
- Subject: Re: [PATCH][MIPS] P5600 scheduling
- Authentication-results: sourceware.org; auth=none
- References: <BD7773622145634B952E5B54ACA8E34936A97AF1 at PUMAIL01 dot pu dot imgtec dot org> <87r43pjx4f dot fsf at talisman dot default> <BD7773622145634B952E5B54ACA8E34936A981D8 at PUMAIL01 dot pu dot imgtec dot org> <87d2f5sw4u dot fsf at sandifor-thinkpad dot stglab dot manchester dot uk dot ibm dot com>
Richard Sandiford <rdsandiford@googlemail.com> writes:
> Yeah, this sounds similar to what I was seeing for Cortex-A8
> with the default -fsched-pressure (which is tuned for and known
> to work well on x86). Did you try with:
>
> -fsched-pressure --param sched-pressure-heuristic=2
Gah, sched-pressure-algorithm rather than sched-pressure-heuristic