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Re: [GCC RFC]A new and simple pass merging paired load store instructions

On 05/20/14 11:14, Wei Mi wrote:
On Tue, May 20, 2014 at 12:13 AM, Bin.Cheng <> wrote:
On Tue, May 20, 2014 at 1:30 AM, Jeff Law <> wrote:
On 05/19/14 00:38, Bin.Cheng wrote:

On Sat, May 17, 2014 at 12:32 AM, Jeff Law <> wrote:

On 05/16/14 04:07, Bin.Cheng wrote:

But can't you go through movXX to generate either the simple insn on the
or the PARALLEL on the thumb?

Yes, I think it's more than upsizing the mode.  There is another
example from one of x86's candidate peephole patch at

The patch wants to do below transformation, which I think is very
target dependent.

Presumably there's no way to go through an expander here?
I don't know very much with respect to this case, maybe the patch
author can help here.

I just checked the expand result for my case. TER could make expand
see the two intrinsics at the same time so in theory it is possible to
make the merge happen in expand. I havn't looked into detail.
I'm not referring to in the gimple->rtl expansion.

I'm referring to using a define_expand to generate the load/store multiple instructions. Given define_expand in the backend, the target independent code can use HAVE_XXX and gen_XXX to test for the existence of the expander and to call the expander to generate insns.


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