This is the mail archive of the
mailing list for the GCC project.
RE: [PATCH, AArch64] Use MOVN to generate 64-bit negative immediates where sensible
- From: "Ian Bolton" <ian dot bolton at arm dot com>
- To: "Ian Bolton" <Ian dot Bolton at arm dot com>, "gcc-patches" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 16 May 2014 10:17:56 +0100
- Subject: RE: [PATCH, AArch64] Use MOVN to generate 64-bit negative immediates where sensible
- Authentication-results: sourceware.org; auth=none
- References: <000001cf6ae4$059c2280$10d46780$ at email@example.com>
Ping. This should be relatively simple to review.
> -----Original Message-----
> From: firstname.lastname@example.org [mailto:gcc-patches-
> email@example.com] On Behalf Of Ian Bolton
> Sent: 08 May 2014 18:36
> To: gcc-patches
> Subject: [PATCH, AArch64] Use MOVN to generate 64-bit negative
> immediates where sensible
> It currently takes 4 instructions to generate certain immediates on
> AArch64 (unless we put them in the constant pool).
> For example ...
> long long
> ffffbeefcafebabe ()
> return 0xFFFFBEEFCAFEBABEll;
> leads to ...
> mov x0, 0x47806
> mov x0, 0xcafe, lsl 16
> mov x0, 0xbeef, lsl 32
> orr x0, x0, -281474976710656
> The above case is tackled in this patch by employing MOVN
> to generate the top 32-bits in a single instruction ...
> mov x0, -71536975282177
> movk x0, 0xcafe, lsl 16
> movk x0, 0xbabe, lsl 0
> Note that where at least two half-words are 0xffff, existing
> code that does the immediate in two instructions is still used.)
> Tested on standard gcc regressions and the attached test case.
> OK for commit?
> 2014-05-08 Ian Bolton <firstname.lastname@example.org>
> * config/aarch64/aarch64.c (aarch64_expand_mov_immediate):
> Use MOVN when top-most half-word (and only that half-word)
> is 0xffff.
> * gcc.target/aarch64/movn_1.c: New test.