This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [RFC][AARCH64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook
- From: Ramana Radhakrishnan <ramrad01 at arm dot com>
- To: Kugan <kugan dot vivekanandarajah at linaro dot org>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Mon, 28 Apr 2014 12:01:23 +0100
- Subject: Re: [RFC][AARCH64] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook
- Authentication-results: sourceware.org; auth=none
- References: <535B9132 dot 40703 at linaro dot org>
On 04/26/14 11:57, Kugan wrote:
Attached patch implements TARGET_ATOMIC_ASSIGN_EXPAND_FENV for AARCH64.
With this, atomic test-case gcc.dg/atomic/c11-atomic-exec-5.c now PASS.
This implementation is based on SPARC and i386 implementations.
Regression tested on qemu-aarch64 for aarch64-none-linux-gnu with no new
regression. Is this OK for trunk?
Again like A32 please test on hardware to make sure this behaves
correctly with c11-atomic-exec-5.c .
If you don't have access to hardware, let us know : we'll take it for a
spin once you update the patch according to Marcus's comments.
regards
Ramana
Thanks,
Kugan
gcc/
+2014-04-27 Kugan Vivekanandarajah <kuganv@linaro.org>
+
+ * config/aarch64/aarch64.c (TARGET_ATOMIC_ASSIGN_EXPAND_FENV): New
+ define.
+ * config/aarch64/aarch64-builtins.c (arm_builtins) : Add
+ AARCH64_BUILTIN_LDFPSCR and AARCH64_BUILTIN_STFPSCR.
+ (aarch64_init_builtins) : Initialize builtins
+ __builtins_aarch64_stfpscr and __builtins_aarch64_ldfpscr.
+ (aarch64_expand_builtin) : Expand builtins __builtins_aarch64_stfpscr
+ and __builtins_aarch64_ldfpscr.
+ (aarch64_atomic_assign_expand_fenv): New function.
+ * config/aarch64/aarch64.md (stfpscr): New pattern.
+ (ldfpscr) : Likewise.
+ (unspecv): Add UNSPECV_LDFPSCR and UNSPECV_STFPSCR.
+
--
Ramana Radhakrishnan
Principal Engineer
ARM Ltd.