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Re: [PATCH v4] PR middle-end/60281


On Fri, Feb 28, 2014 at 08:47:56AM +0100, Bernd Edlinger wrote:
> I see the problem too.
> 
> But I think it is not necessary to change the stack alignment
> to solve the problem.
> 
> It appears to me that the code in asan_emit_stack_protection
> is just wrong. It uses SImode when the memory is not aligned
> enough for that mode. This would not happen if that code
> is rewritten to use get_best_mode, and by the way, even on
> x86_64 the emitted code is not optimal, because that target
> could work with DImode more efficiently.

No, the use of SImode on x86_64 is very much intentional, movabsqs + movq
are generally slower.

> So, to fix that, it would be better to concentrate on that function,
> and use word_mode instead of SImode, and let get_best_mode
> choose the required mode.

No.  As I wrote earlier, the alternative is to use unaligned stores for ARM,
I've asked Lin to benchmark that compared to his patch, but haven't seen
that done yet.

	Jakub


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