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Re: [PATCH ARM] Fix PR60264 (ICE in dwarf2out_frame_debug_adjust_cfa)
- From: Christian Bruel <christian dot bruel at st dot com>
- To: <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 18 Feb 2014 16:35:49 +0100
- Subject: Re: [PATCH ARM] Fix PR60264 (ICE in dwarf2out_frame_debug_adjust_cfa)
- Authentication-results: sourceware.org; auth=none
- References: <53037D1C dot 1000104 at st dot com>
probably easier to review with patch attached...
2014-02-18 Christian Bruel <christian.bruel@st.com>
PR target/60264
* config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Restore cfa register.
(arm_expand_epilogue_apcs_frame): Set RTX_FRAME_RELATED_P.
2014-02-18 Christian Bruel <christian.bruel@st.com>
PR target/60264
* gcc.target/arm/pr60264.c
* gcc.target/arm/pr60264-2.c
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 207817)
+++ gcc/config/arm/arm.c (working copy)
@@ -19909,8 +19909,13 @@ arm_emit_vfp_multi_reg_pop (int first_reg, int num
par = emit_insn (par);
REG_NOTES (par) = dwarf;
+ /* Make sure cfa doesn't leave with IP_REGNUM. */
+ if (TARGET_VFP && REGNO (base_reg) == IP_REGNUM)
+ add_reg_note (par, REG_CFA_DEF_CFA, hard_frame_pointer_rtx);
+
arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs,
base_reg, base_reg);
+
}
/* Generate and emit a pattern that will be recognized as LDRD pattern. If even
@@ -27103,10 +27108,12 @@ arm_expand_epilogue_apcs_frame (bool really_return
int saved_size = arm_get_vfp_saved_size ();
if (saved_size > 0)
{
- floats_from_frame += saved_size;
- emit_insn (gen_addsi3 (gen_rtx_REG (SImode, IP_REGNUM),
- hard_frame_pointer_rtx,
- GEN_INT (-floats_from_frame)));
+ rtx insn;
+ floats_from_frame += saved_size;
+ insn = emit_insn (gen_addsi3 (gen_rtx_REG (SImode, IP_REGNUM),
+ hard_frame_pointer_rtx,
+ GEN_INT (-floats_from_frame)));
+ RTX_FRAME_RELATED_P (insn) = 1;
}
/* Generate VFP register multi-pop. */
@@ -27179,11 +27186,13 @@ arm_expand_epilogue_apcs_frame (bool really_return
num_regs = bit_count (saved_regs_mask);
if ((offsets->outgoing_args != (1 + num_regs)) || cfun->calls_alloca)
{
+ rtx insn;
emit_insn (gen_blockage ());
/* Unwind the stack to just below the saved registers. */
- emit_insn (gen_addsi3 (stack_pointer_rtx,
- hard_frame_pointer_rtx,
- GEN_INT (- 4 * num_regs)));
+ insn = emit_insn (gen_addsi3 (stack_pointer_rtx,
+ hard_frame_pointer_rtx,
+ GEN_INT (- 4 * num_regs)));
+ RTX_FRAME_RELATED_P (insn) = 1;
}
arm_emit_multi_reg_pop (saved_regs_mask);
Index: gcc/testsuite/gcc.target/arm/pr60264-2.c
===================================================================
--- gcc/testsuite/gcc.target/arm/pr60264-2.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/pr60264-2.c (working copy)
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-mapcs -mfloat-abi=hard -g" } */
+
+double bar(void);
+
+int foo(void)
+{
+ int i = bar() + bar();
+
+ return i;
+}
+
Index: gcc/testsuite/gcc.target/arm/pr60264.c
===================================================================
--- gcc/testsuite/gcc.target/arm/pr60264.c (revision 0)
+++ gcc/testsuite/gcc.target/arm/pr60264.c (working copy)
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mapcs -g" } */
+
+void
+bar()
+{
+ foo();
+ foo();
+}