This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [Patch,AArch64] Support SISD variants of SCVTF,UCVTF
- From: Marcus Shawcroft <marcus dot shawcroft at gmail dot com>
- To: Vidya Praveen <vidyapraveen at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Marcus Shawcroft <marcus dot shawcroft at arm dot com>
- Date: Tue, 21 Jan 2014 13:35:54 +0000
- Subject: Re: [Patch,AArch64] Support SISD variants of SCVTF,UCVTF
- Authentication-results: sourceware.org; auth=none
- References: <20140113192730 dot GE20498 at e103625-lin dot cambridge dot arm dot com>
On 13 January 2014 19:27, Vidya Praveen <vidyapraveen@arm.com> wrote:
> Hello,
>
> This patch adds support to the SISD variants of SCVTF/UCVTF instructions.
> This also refactors the existing support for floating point instruction
> variants of SCVTF/UCVTF in order to direct the instruction selection based
> on the constraints. Given that the floating-point variations supports
> inequal width convertions (SI to DF and DI to SF), new mode iterator w1 and
> w2 have been introduced and fcvt_target,FCVT_TARGET have been extended to
> support non vector type. Since this patch changes the existing patterns, the
> testcase includes tests for both SISD and floating point variations of the
> instructions.
>
> Tested for aarch64-none-elf.
>
> OK for trunk?
OK but wait for stage-1.
/Marcus