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Re: [SPARC] Fix PR target/59316


> Note that you could probably just reload the tmp1_var value rather than
> needing to store the fsr value again to clear exceptions from it, unless
> there's an architecture-specific reason the tmp1_var value might no longer
> be the right value to load to clear exceptions.  (This is what x86 does
> for SSE state, loading the same value for exceptions-cleared SSE state
> every iteration of the loop.)

That depends upon the context I'd think: the FSR contains the FP condition 
code so reloading tmp1_var will overwrite it with the old value (and SPARC is 
not a cc0 target).  Would that be safe?

In the meantime, it occurred to me that I very likely don't need to mask the 
value of tmp3_var before calling __atomic_feraiseexcept on it.  glibc does it 
but this looks unnecessary even there.

-- 
Eric Botcazou


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