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Re: [Patch, RTL] Eliminate redundant vec_select moves.
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Tejas Belagod <tbelagod at arm dot com>, "Yukhin, Kirill" <kirill dot yukhin at intel dot com>
- Cc: Jeff Law <law at redhat dot com>, Bill Schmidt <wschmidt at linux dot vnet dot ibm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Richard Sandiford <rdsandiford at googlemail dot com>
- Date: Thu, 5 Dec 2013 05:30:07 -0800
- Subject: Re: [Patch, RTL] Eliminate redundant vec_select moves.
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- References: <527A4309 dot 70209 at arm dot com> <8738n9sj8o dot fsf at talisman dot default> <527A5EF4 dot 5090505 at arm dot com> <87y551r01p dot fsf at talisman dot default> <527A7612 dot 2080406 at arm dot com> <877gcll9ht dot fsf at talisman dot default> <527BA073 dot 30900 at arm dot com> <87zjpg1d5p dot fsf at sandifor-thinkpad dot stglab dot manchester dot uk dot ibm dot com> <527BD411 dot 6060300 at arm dot com> <878uwwdnx0 dot fsf at talisman dot default> <52962733 dot 7030005 at arm dot com> <87r4a0c1ul dot fsf at talisman dot default> <529F5318 dot 1030505 at arm dot com> <CAMe9rOr9GqTEjfTPXB7gJLNRVkdjCZ_RMzWBOYFX8q4K8n=RJg at mail dot gmail dot com> <529F666F dot 4000507 at redhat dot com> <CAMe9rOo+2LnE=T9y7bmoxfWov+T4WDizTmpU5jFhpYe_xadgXA at mail dot gmail dot com> <52A07CF6 dot 6010003 at arm dot com>
On Thu, Dec 5, 2013 at 5:17 AM, Tejas Belagod <tbelagod@arm.com> wrote:
> H.J. Lu wrote:
>>
>> On Wed, Dec 4, 2013 at 9:29 AM, Jeff Law <law@redhat.com> wrote:
>>>
>>> On 12/04/13 09:14, H.J. Lu wrote:
>>>
>>>>> +
>>>>> +/* { dg-final { scan-rtl-dump "deleting noop move" "combine" { target
>>>>> aarch64*-*-* } } } */
>>>>
>>>>
>>>> Any particular reason why it doesn't work for x86?
>>>
>>> I don't think so. I'm pretty sure Tejas is focused on ARM platforms for
>>> the
>>> obvious reason.
>>>
>>
>> Then please add "i?86-*-* x86_64-*-*".
>
>
> Hi,
>
> I tried this test on x86_64. Though the same RTL gets generated
>
> (set (reg:Sf) (vec_select:SF (reg:V4Sf) (parallel [const 0]))
>
> for -msse2, this optimization does not seem to trigger. Only later in a
> post-reload-split does it get eliminated to something like
>
> (set (reg:SF 21 xmm0) (reg:SF 21 xmm0))
>
> I suspect simplify_subreg_regno () may not be returning what we want here -
> sorry, I don't know enough about x86 to debug deeper.
Kirill, can you take a look why it doesn't work for x86?
> I could either keep this test case as is or if you could give it a quick
> look to see why it does not trigger, it would be useful to add x86 to this
> test.
>
> Thanks,
> Tejas.
>
--
H.J.