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Re: [PATCH/middle-end 2/6] __builtin_thread_pointer and AARCH64 ILP32


On 12/03/13 21:24, Andrew Pinski wrote:
Hi,
   With ILP32 AARCH64, Pmode (DImode) != ptrmode (SImode) so the variable decl
has a mode of SImode while the register is DImode.  So the target that gets
passed down to expand_builtin_thread_pointer is NULL as expand does not
know how to get a subreg for a pointer type.

This fixes the problem by handling a NULL target like we are able to handle
for a non register/correct mode target inside expand_builtin_thread_pointer.

OK?  Build and tested for aarch64-elf with no regressions.

Thanks,
Andrew Pinski

	* builtins.c (expand_builtin_thread_pointer): Create a new target
	when the target is NULL.
---
  gcc/ChangeLog  |    5 +++++
  gcc/builtins.c |    2 +-
  2 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/gcc/builtins.c b/gcc/builtins.c
index 4f1c818..66797fa 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -5699,7 +5699,7 @@ expand_builtin_thread_pointer (tree exp, rtx target)
    if (icode != CODE_FOR_nothing)
      {
        struct expand_operand op;
-      if (!REG_P (target) || GET_MODE (target) != Pmode)
+      if (target == NULL_RTX || !REG_P (target) || GET_MODE (target) != Pmode)
  	target = gen_reg_rtx (Pmode);
        create_output_operand (&op, target, Pmode);
        expand_insn (icode, 1,&op);

Shouldn't thread pointer have ptr_mode instead? I'm aware that on AArch64 the thread pointer system register tpidr_el0 is 64-bit wide regardless of ILP32 or not, but in the abstracted view of AArch64 ILP32 world, the thread pointer shall be a 32-bit pointer; the OS should have taken care of the hardware register tpidr_el0 by having its higher 32 bits cleared. I think expand_builtin_thread_pointer and expand_builtin_set_thread_pointer should use ptr_mode instead. Correct me if I missed anything.

Add Chung-Lin Tang to the CC list; Chung-Lin wrote these builtins in r192364

Yufeng


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