This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH, rs6000] Fix ICE when loading vectors into GPRs in little-endian


On Tue, Nov 19, 2013 at 10:03 AM, Ulrich Weigand <uweigand@de.ibm.com> wrote:
> Hello,
>
> running the testsuite in powerpc64le-linux with --with-cpu=power7 causes
> FAIL: tmpdir-g++.dg-struct-layout-1/t024 cp_compat_x_tst.o compile,  (internal compiler error)
> due to an unrecognizable insn
>
> (insn 137 136 138 5 (set (reg:V2DI 5 5)
>         (vec_select:V2DI (reg:V2DI 211)
>             (parallel [
>                     (const_int 1 [0x1])
>                     (const_int 0 [0])
>                 ]))) /home/gcc-build/gcc/testsuite/g++/g++.dg-struct-layout-1//t024_test.h:6 -1
>      (nil))
>
> i.e. an attempted vector permute into a GPR hard reg.  It turns out this happens
> when rs6000_emit_le_vsx_move is called with a GPR hard reg destination, which
> in turn can happen when passing vectors to a vararg routine.
>
> However, rs6000_emit_le_vsx_move is not set up to handle GPRs.  Fortunately,
> for GPRs this routine is not actually necessary; vectors can be loaded into
> GPRs using the regular move patterns.
>
> This patch fixes the problem by not invoking the rs6000_emit_le_vsx_move special
> case if a hard reg GPR is involved as source/destination.
>
> Tested on powerpc64le-linux.
>
> OK for mainline?
>
> Bye,
> Ulrich
>
>
> ChangeLog:
>
>         * config/rs6000/vector.md ("mov<mode>"): Do not call
>         rs6000_emit_le_vsx_move to move into or out of GPRs.
>         * config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Assert
>         source and destination are not GPR hard regs.

Okay.

Thanks, David


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]