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Re: RFC: patch to build GCC for arm with LRA


Yvan Roux <yvan.roux@linaro.org> writes:
> @@ -5454,6 +5454,16 @@ strip_address_mutations (rtx *loc, enum rtx_code *outer_code)
>  	/* Things like SIGN_EXTEND, ZERO_EXTEND and TRUNCATE can be
>  	   used to convert between pointer sizes.  */
>  	loc = &XEXP (*loc, 0);
> +      else if (GET_RTX_CLASS (code) == RTX_BITFIELD_OPS)
> +	{
> +	  /* Bitfield operations [SIGN|ZERO]_EXTRACT can be used too.  */
> +	  enum machine_mode mode = GET_MODE(*loc);
> +	  unsigned HOST_WIDE_INT len = INTVAL (XEXP (*loc, 1));
> +	  HOST_WIDE_INT pos = INTVAL (XEXP (*loc, 2));
> +
> +	  if (pos == (BITS_BIG_ENDIAN ? GET_MODE_PRECISION (mode) - len : 0))
> +	    loc = &XEXP (*loc, 0);
> +	}

This means that the other values of "pos" bypass the:

      else
	return loc;

so you'll get an infinite loop.  I think it would be neater to split
this out into:

/* Return true if X is a sign_extract or zero_extract from the least
   significant bit.  */

static bool
lsb_bitfield_op_p (rtx X)
{
  ...;
}

    else if (lsb_bitfield_op_p (*loc))
      loc = &XEXP (*loc, 0);

Looks good to me otherwise FWIW.

Thanks,
Richard


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