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Re: [PATCH GCC]Catch more MEM_REFs sharing common addressing part in gimple strength reduction


On Mon, 2013-09-02 at 11:15 +0200, Richard Biener wrote:
> On Mon, Sep 2, 2013 at 8:56 AM, bin.cheng <bin.cheng@arm.com> wrote:
> > Hi,
> >
> > The gimple-ssa-strength-reduction pass handles CAND_REFs in order to find
> > different MEM_REFs sharing common part in addressing expression.  If such
> > MEM_REFs are found, the pass rewrites MEM_REFs, and produces more efficient
> > addressing expression during the RTL passes.
> > The pass analyzes addressing expression in each MEM_REF to see if it can be
> > formalized as follows:
> >      base:    MEM_REF (T1, C1)
> >      offset:  MULT_EXPR (PLUS_EXPR (T2, C2), C3)
> >      bitpos:  C4 * BITS_PER_UNIT
> > Then restructures it into below form:
> >      MEM_REF (POINTER_PLUS_EXPR (T1, MULT_EXPR (T2, C3)),
> >               C1 + (C2 * C3) + C4)
> > At last, rewrite the MEM_REFs if there are two or more sharing common
> > (non-constant) part.
> > The problem is it doesn't back trace T2.  If T2 is recorded as a CAND_ADD in
> > form of "T2' + C5", the MEM_REF should be restructure into:
> >      MEM_REF (POINTER_PLUS_EXPR (T1, MULT_EXPR (T2', C3)),
> >               C1 + (C2 * C3) + C4 + (C5 * C3))
> >
> > The patch also includes a test case to illustrate the problem.
> >
> > Bootstrapped and tested on x86/x86_64/arm-a15, is it ok?
> 
> This looks ok to me if Bill is ok with it.

Sorry, I've been on vacation and haven't been checking in until now.
I'll have a look at this tomorrow -- sounds good on the surface!

Thanks,
Bill

> 
> Thanks,
> Richard.
> 
> > Thanks.
> > bin
> >
> > 2013-09-02  Bin Cheng  <bin.cheng@arm.com>
> >
> >         * gimple-ssa-strength-reduction.c (backtrace_base_for_ref): New.
> >         (restructure_reference): Call backtrace_base_for_ref.
> >
> > gcc/testsuite/ChangeLog
> > 2013-09-02  Bin Cheng  <bin.cheng@arm.com>
> >
> >         * gcc.dg/tree-ssa/slsr-39.c: New test.
> 


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